linux-kernel - [PATCH 4.4 288/312] net: macb: replace macb_writel() call by queue

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Message-Id: <20200508123144.643175909@linuxfoundation.org>
Date:   Fri,  8 May 2020 14:34:39 +0200
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org,
        Cyrille Pitchen <cyrille.pitchen@...el.com>,
        Nicolas Ferre <nicolas.ferre@...el.com>,
        "David S. Miller" <davem@...emloft.net>
Subject: [PATCH 4.4 288/312] net: macb: replace macb_writel() call by queue_writel() to update queue ISR

From: Cyrille Pitchen <cyrille.pitchen@...el.com>

commit ba5049945421b8d2f3e2af786a15d13b82316503 upstream.

macb_interrupt() should not use macb_writel(bp, ISR, <value>) but only
queue_writel(queue, ISR, <value>).

There is one IRQ and one set of {ISR, IER, IDR, IMR} [1] registers per
queue on gem hardware, though only queue0 is actually used for now to
receive frames: other queues can already be used to transmit frames.

The queue_readl() and queue_writel() helper macros are designed to access
the relevant IRQ registers.

[1]
ISR: Interrupt Status Register
IER: Interrupt Enable Register
IDR: Interrupt Disable Register
IMR: Interrupt Mask Register

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@...el.com>
Fixes: bfbb92c44670 ("net: macb: Handle the RXUBR interrupt on all devices")
Acked-by: Nicolas Ferre <nicolas.ferre@...el.com>
Signed-off-by: David S. Miller <davem@...emloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

---
 drivers/net/ethernet/cadence/macb.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -1104,7 +1104,7 @@ static irqreturn_t macb_interrupt(int ir
 			macb_writel(bp, NCR, ctrl | MACB_BIT(RE));

 			if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
-				macb_writel(bp, ISR, MACB_BIT(RXUBR));
+				queue_writel(queue, ISR, MACB_BIT(RXUBR));
 		}

 		if (status & MACB_BIT(ISR_ROVR)) {