linux-kernel - Re: [PATCH v4 07/13] mips: Add CONFIG/CONFIG6/Cause reg fields macro

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Date:   Fri, 22 May 2020 09:28:55 +0200
From:   Thomas Bogendoerfer <tsbogend@...ha.franken.de>
To:     Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc:     Serge Semin <fancer.lancer@...il.com>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Paul Burton <paulburton@...nel.org>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Arnd Bergmann <arnd@...db.de>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        Zhou Yanjie <zhouyanjie@...o.com>,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        WANG Xuerui <git@...0n.name>,
        Allison Randal <allison@...utok.net>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 07/13] mips: Add CONFIG/CONFIG6/Cause reg fields macro

On Thu, May 21, 2020 at 05:07:18PM +0300, Serge Semin wrote:
> There are bit fields which persist in the MIPS CONFIG and CONFIG6
> registers, but haven't been described in the generic mipsregs.h
> header so far. In particular, the generic CONFIG bitfields are
> BE - endian mode, BM - burst mode, SB - SimpleBE, OCP interface mode
> indicator, UDI - user-defined "CorExtend" instructions, DSP - data
> scratch pad RAM present, ISP - instruction scratch pad RAM present,
> etc. The core-specific CONFIG6 bitfields are JRCD - jump register
> cache prediction disable, R6 - MIPSr6 extensions enable, IFUPerfCtl -
> IFU performance control, SPCD - sleep state performance counter, DLSB -
> disable load/store bonding. A new exception code reported in the
> ExcCode field of the Cause register: 30 - Parity/ECC error exception
> happened on either fetch, load or cache refill. Lets add them to the
> mipsregs.h header to be used in future platform code, which have them
> utilized.
> 
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> Cc: Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>
> Cc: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
> Cc: Paul Burton <paulburton@...nel.org>
> Cc: Ralf Baechle <ralf@...ux-mips.org>
> Cc: Arnd Bergmann <arnd@...db.de>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: devicetree@...r.kernel.org
> ---
>  arch/mips/include/asm/mipsregs.h | 19 +++++++++++++++++++
>  arch/mips/kernel/spram.c         |  4 ++--
>  2 files changed, 21 insertions(+), 2 deletions(-)

applied to mips-next.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]