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Message-ID: <CAAhV-H5B+6drcEiz=JCexa0LC3JAPS0K5WZ0zwndvuKv-e9NRQ@mail.gmail.com>
Date: Fri, 29 May 2020 12:13:36 +0800
From: Huacai Chen <chenhc@...ote.com>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: Marc Zyngier <maz@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Rob Herring <robh+dt@...nel.org>,
"open list:MIPS" <linux-mips@...r.kernel.org>,
devicetree@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/3] MIPS: Loongson64: Initial LS7A PCH support
Hi, Jiaxun,
On Fri, May 29, 2020 at 11:45 AM Jiaxun Yang <jiaxun.yang@...goat.com> wrote:
>
> With this series, LS7A and Loongson-3A4000 is finally supported
> note that this series should depend on irqchip support[1], which
> is likely to get merged soon.
>
> Thanks.
>
> [1]: https://lkml.org/lkml/2020/5/16/72
>
> Jiaxun Yang (3):
> dt-bindings: mips: Document two Loongson generic boards
> MIPS: Loongson64: DeviceTree for LS7A PCH
> MIPS: Loongson64:Load LS7A dtbs
>
> .../bindings/mips/loongson/devices.yaml | 8 +
> arch/mips/boot/dts/loongson/Makefile | 5 +-
> .../dts/loongson/loongson3-r4-package.dtsi | 74 +++++++
> .../dts/loongson/loongson3_4core_ls7a.dts | 25 +++
> .../boot/dts/loongson/loongson3_r4_ls7a.dts | 10 +
> arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 185 ++++++++++++++++++
> .../asm/mach-loongson64/builtin_dtbs.h | 2 +
> arch/mips/loongson64/env.c | 56 +++---
> 8 files changed, 342 insertions(+), 23 deletions(-)
> create mode 100644 arch/mips/boot/dts/loongson/loongson3-r4-package.dtsi
> create mode 100644 arch/mips/boot/dts/loongson/loongson3_4core_ls7a.dts
> create mode 100644 arch/mips/boot/dts/loongson/loongson3_r4_ls7a.dts
> create mode 100644 arch/mips/boot/dts/loongson/ls7a-pch.dtsi
I think the naming can be like this: Old processor (Loongson 3A R1~R3)
use loongson64c_ prefix instead of loongson3, new processor (Loongson
3A R4) use loongson64g_ prefix instead of loongson3_r4, and
Loongson-2K use loongson64r_ prefix, this makes them consistent with
their PRID definitions.
>
> --
> 2.27.0.rc0
>
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