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Message-ID: <20200711142322.GI21277@dragon>
Date: Sat, 11 Jul 2020 22:23:23 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: Qiang Zhao <qiang.zhao@....com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
leoyang.li@....com, Chuanhua Han <chuanhua.han@....com>
Subject: Re: [RESEND PATCH 1/2] arm64: dts: lx2160a: add dspi controller DT
nodes
On Mon, Jun 22, 2020 at 04:31:08PM +0800, Qiang Zhao wrote:
> From: Chuanhua Han <chuanhua.han@....com>
>
> Add the dspi support on lx2160
>
> Signed-off-by: Chuanhua Han <chuanhua.han@....com>
> Signed-off-by: Bao Xiaowei <xiaowei.bao@....com>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> Signed-off-by: Zhao Qiang <qiang.zhao@....com>
When you resend patches, please state why. Should I drop the patches
I just applied and pick up this version instead?
Shawn
> ---
> arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 39 ++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index abaeb58..f56172f 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -777,6 +777,45 @@
> status = "disabled";
> };
>
> + dspi0: spi@...0000 {
> + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0 0x2100000 0x0 0x10000>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clockgen 4 7>;
> + clock-names = "dspi";
> + spi-num-chipselects = <5>;
> + bus-num = <0>;
> + status = "disabled";
> + };
> +
> + dspi1: spi@...0000 {
> + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0 0x2110000 0x0 0x10000>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clockgen 4 7>;
> + clock-names = "dspi";
> + spi-num-chipselects = <5>;
> + bus-num = <1>;
> + status = "disabled";
> + };
> +
> + dspi2: spi@...0000 {
> + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0 0x2120000 0x0 0x10000>;
> + interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clockgen 4 7>;
> + clock-names = "dspi";
> + spi-num-chipselects = <5>;
> + bus-num = <2>;
> + status = "disabled";
> + };
> +
> esdhc0: esdhc@...0000 {
> compatible = "fsl,esdhc";
> reg = <0x0 0x2140000 0x0 0x10000>;
> --
> 2.7.4
>
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