linux-kernel - Re: [PATCH 2/4] ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support

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Message-ID: <CAMuHMdXm9D8-bg3XdGqD7AKe2vMiZLNWENH3A0w-b7j=qZS=pA@mail.gmail.com>
Date:   Thu, 3 Sep 2020 13:59:04 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc:     Magnus Damm <magnus.damm@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Prabhakar <prabhakar.csengg@...il.com>
Subject: Re: [PATCH 2/4] ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support

Hi Prabhakar,

On Tue, Aug 25, 2020 at 6:28 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> Add support for the SPI NOR device which is connected to MSIOF0 interface
> on the iWave RainboW-G21d-q7 board.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Chris Paterson <Chris.Paterson2@...esas.com>

> --- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> +++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> @@ -220,6 +220,32 @@
>         status = "okay";
>  };
>
> +&msiof0 {
> +       pinctrl-0 = <&msiof0_pins>;
> +       pinctrl-names = "default";
> +       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> +
> +       status = "okay";
> +
> +       flash1: flash@0 {
> +               compatible = "sst,sst25vf016b", "jedec,spi-nor";
> +               reg = <0>;
> +               spi-max-frequency = <50000000>;
> +               m25p,fast-read;
> +
> +               partitions {
> +                       compatible = "fixed-partitions";
> +                       #address-cells = <1>;
> +                       #size-cells = <1>;
> +
> +                       partition@0 {
> +                               label = "user";
> +                               reg = <0x00000000 0x00200000>;
> +                       };
> +               };
> +       };
> +};
> +
>  &pci0 {
>         pinctrl-0 = <&usb0_pins>;
>         pinctrl-names = "default";
> @@ -266,6 +292,11 @@
>                 function = "i2c2";
>         };
>
> +       msiof0_pins: msiof0 {
> +               groups = "msiof0_clk", "msiof0_tx", "msiof0_rx";

I think you're missing "msiof0_sync", connected to SPI_CS0#?

With that fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>

> +               function = "msiof0";
> +       };

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds