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Date:   Mon, 12 Oct 2020 04:30:00 +0000
From:   Joel Stanley <joel@....id.au>
To:     Billy Tsai <billy_tsai@...eedtech.com>
Cc:     Rob Herring <robh+dt@...nel.org>, Andrew Jeffery <andrew@...id.au>,
        devicetree <devicetree@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        linux-aspeed <linux-aspeed@...ts.ozlabs.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
        BMC-SW <BMC-SW@...eedtech.com>
Subject: Re: [PATCH 1/3] Arm: dts: aspeed-g6: Fix the register range of gpio

On Mon, 12 Oct 2020 at 03:32, Billy Tsai <billy_tsai@...eedtech.com> wrote:
>
> This patch is used to fix the memory range of gpio0
>
> Signed-off-by: Billy Tsai <billy_tsai@...eedtech.com>

Reviewed-by: Joel Stanley <joel@....id.au>

> ---
>  arch/arm/boot/dts/aspeed-g6.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index 97ca743363d7..ad19dce038ea 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -357,7 +357,7 @@
>                                 #gpio-cells = <2>;
>                                 gpio-controller;
>                                 compatible = "aspeed,ast2600-gpio";
> -                               reg = <0x1e780000 0x800>;
> +                               reg = <0x1e780000 0x400>;
>                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>                                 gpio-ranges = <&pinctrl 0 0 208>;
>                                 ngpios = <208>;
> --
> 2.17.1
>

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