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Message-ID: <ed3847f0-f219-547a-e887-cd0d48f77dda@linux.intel.com>
Date:   Mon, 26 Oct 2020 16:46:50 +0200
From:   Mathias Nyman <mathias.nyman@...ux.intel.com>
To:     Sandeep Singh <Sandeep.Singh@....com>, mathias.nyman@...el.com,
        gregkh@...uxfoundation.org, linux-usb@...r.kernel.org,
        linux-kernel@...r.kernel.org, sanket.goswami@....com,
        Nehal-bakulchandra.Shah@....com
Cc:     Shyam-sundar.S-k@....com
Subject: Re: [PATCH v2] usb: xhci: Workaround for S3 issue on AMD SNPS 3.0 xHC

On 23.10.2020 16.15, Sandeep Singh wrote:
> From: Sandeep Singh <sandeep.singh@....com>
> 
> On some platform of AMD, S3 fails with HCE and SRE errors. To fix this,
> need to disable a bit which is enable in sparse controller.
> 
> Signed-off-by: Sanket Goswami <Sanket.Goswami@....com>
> Signed-off-by: Sandeep Singh <sandeep.singh@....com>
> ---
> Changes since v1:(https://lkml.org/lkml/2020/10/23/368)
> 	-> Add xhci.h changes
> 

Added to queue.
This looks like it should go to stable as well.

-Mathias

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