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Message-Id: <20201028145117.1731876-1-geert+renesas@glider.be>
Date: Wed, 28 Oct 2020 15:51:17 +0100
From: Geert Uytterhoeven <geert+renesas@...der.be>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Heiko Stuebner <heiko@...ech.de>, linux-gpio@...r.kernel.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
Geert Uytterhoeven <geert+renesas@...der.be>
Subject: [PATCH] pinctrl: Remove hole in pinctrl_gpio_range
On 64-bit platforms, pointer size and alignment are 64-bit, hence two
4-byte holes are present before the pins and gc members of the
pinctrl_gpio_range structure. Get rid of these holes by moving the
pins pointer.
This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
---
Compile-tested only (arm/multi_v7_defconfig and arm64/defconfig).
---
include/linux/pinctrl/pinctrl.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h
index 2aef59df93d70550..70b45d28e7a9293b 100644
--- a/include/linux/pinctrl/pinctrl.h
+++ b/include/linux/pinctrl/pinctrl.h
@@ -51,8 +51,8 @@ struct pinctrl_pin_desc {
* @id: an ID number for the chip in this range
* @base: base offset of the GPIO range
* @pin_base: base pin number of the GPIO range if pins == NULL
- * @pins: enumeration of pins in GPIO range or NULL
* @npins: number of pins in the GPIO range, including the base number
+ * @pins: enumeration of pins in GPIO range or NULL
* @gc: an optional pointer to a gpio_chip
*/
struct pinctrl_gpio_range {
@@ -61,8 +61,8 @@ struct pinctrl_gpio_range {
unsigned int id;
unsigned int base;
unsigned int pin_base;
- unsigned const *pins;
unsigned int npins;
+ unsigned const *pins;
struct gpio_chip *gc;
};
--
2.25.1
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