linux-kernel - Re: [PATCH v2 2/4] spi: Add devicetree bindings documentation for Loongson SPI

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Message-ID: <0d5e0995-8d5b-199b-4194-87567f0fd5a8@flygoat.com>
Date:   Tue, 8 Dec 2020 15:49:30 +0800
From:   Jiaxun Yang <jiaxun.yang@...goat.com>
To:     Qing Zhang <zhangqing@...ngson.cn>,
        Mark Brown <broonie@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Cc:     linux-spi@...r.kernel.org, Huacai Chen <chenhc@...ote.com>,
        devicetree@...r.kernel.org, linux-mips@...r.kernel.org,
        linux-kernel@...r.kernel.org, gaojuxin@...ngson.cn,
        yangtiezhu@...ngson.cn
Subject: Re: [PATCH v2 2/4] spi: Add devicetree bindings documentation for
 Loongson SPI


在 2020/12/8 15:44, Qing Zhang 写道:
> Add spi-ls7a binding documentation.
>
> Signed-off-by: Qing Zhang <zhangqing@...ngson.cn>
> ---
>   Documentation/devicetree/bindings/spi/spi-ls7a.txt | 31 ++++++++++++++++++++++
>   1 file changed, 31 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/spi/spi-ls7a.txt


Hi Qing,

Please use dt schema instead.

Thanks.

- Jiaxun


> diff --git a/Documentation/devicetree/bindings/spi/spi-ls7a.txt b/Documentation/devicetree/bindings/spi/spi-ls7a.txt
> new file mode 100644
> index 0000000..56247b5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-ls7a.txt
> @@ -0,0 +1,31 @@
> +Binding for LOONGSON LS7A SPI controller
> +
> +Required properties:
> +- compatible: should be "pci0014,7a0b.0","pci0014,7a0b","pciclass088000","pciclass0880".
> +- reg: reference IEEE Std 1275-1994.
> +- #address-cells: <1>, as required by generic SPI binding.
> +- #size-cells: <0>, also as required by generic SPI binding.
> +- #interrupts: No hardware interrupt.
> +
> +Child nodes as per the generic SPI binding.
> +
> +Example:
> +
> +			spi@16,0 {
> +				compatible = "pci0014,7a0b.0",
> +						"pci0014,7a0b",
> +						"pciclass088000",
> +						"pciclass0880";
> +
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				reg = <0xb000 0x0 0x0 0x0 0x0>;
> +				num-chipselects = <0>;
> +				spiflash: s25fl016k@0 {
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				compatible ="spansion,s25fl016k","jedec,spi-nor";
> +				spi-max-frequency=<50000000>;
> +				reg=<0>;
> +				};
> +			};