| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <1608279292-24760-2-git-send-email-kgunda@codeaurora.org>
Date: Fri, 18 Dec 2020 13:44:51 +0530
From: Kiran Gunda <kgunda@...eaurora.org>
To: robh@...nel.org, swboyd@...omium.org,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Lee Jones <lee.jones@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Stephen Boyd <sboyd@...nel.org>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Kiran Gunda <kgunda@...eaurora.org>
Subject: [PATCH V4 1/2] mfd: qcom-spmi-pmic: Convert bindings to .yaml format
Convert the bindings from .txt to .yaml format.
Signed-off-by: Kiran Gunda <kgunda@...eaurora.org>
---
.../devicetree/bindings/mfd/qcom,spmi-pmic.txt | 80 -------------
.../devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 127 +++++++++++++++++++++
2 files changed, 127 insertions(+), 80 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt
create mode 100644 Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt
deleted file mode 100644
index 79367a4..0000000
--- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt
+++ /dev/null
@@ -1,80 +0,0 @@
- Qualcomm SPMI PMICs multi-function device bindings
-
-The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084
-PMICs. These PMICs use a QPNP scheme through SPMI interface.
-QPNP is effectively a partitioning scheme for dividing the SPMI extended
-register space up into logical pieces, and set of fixed register
-locations/definitions within these regions, with some of these regions
-specifically used for interrupt handling.
-
-The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are
-interfaced to the chip via the SPMI (System Power Management Interface) bus.
-Support for multiple independent functions are implemented by splitting the
-16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
-each. A function can consume one or more of these fixed-size register regions.
-
-Required properties:
-- compatible: Should contain one of:
- "qcom,pm8941",
- "qcom,pm8841",
- "qcom,pma8084",
- "qcom,pm8019",
- "qcom,pm8226",
- "qcom,pm8110",
- "qcom,pma8084",
- "qcom,pmi8962",
- "qcom,pmd9635",
- "qcom,pm8994",
- "qcom,pmi8994",
- "qcom,pm8916",
- "qcom,pm8004",
- "qcom,pm8909",
- "qcom,pm8950",
- "qcom,pmi8950",
- "qcom,pm8998",
- "qcom,pmi8998",
- "qcom,pm8005",
- or generalized "qcom,spmi-pmic".
-- reg: Specifies the SPMI USID slave address for this device.
- For more information see:
- Documentation/devicetree/bindings/spmi/spmi.yaml
-
-Required properties for peripheral child nodes:
-- compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name.
-
-Optional properties for peripheral child nodes:
-- interrupts: Interrupts are specified as a 4-tuple. For more information
- see:
- Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
-- interrupt-names: Corresponding interrupt name to the interrupts property
-
-Each child node of SPMI slave id represents a function of the PMIC. In the
-example below the rtc device node represents a peripheral of pm8941
-SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1.
-
-Example:
-
- spmi {
- compatible = "qcom,spmi-pmic-arb";
-
- pm8941@0 {
- compatible = "qcom,pm8941", "qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
-
- rtc {
- compatible = "qcom,rtc";
- interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "alarm";
- };
- };
-
- pm8941@1 {
- compatible = "qcom,pm8941", "qcom,spmi-pmic";
- reg = <0x1 SPMI_USID>;
-
- regulator {
- compatible = "qcom,regulator";
- regulator-name = "8941_boost";
- };
- };
- };
diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
new file mode 100644
index 0000000..e458dd1
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
@@ -0,0 +1,127 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SPMI PMICs multi-function device bindings
+
+maintainers:
+ - Stephen Boyd <sboyd@...nel.org>
+
+description: |
+ The Qualcomm SPMI PMICs use a QPNP scheme through SPMI interface.
+ QPNP is effectively a partitioning scheme for dividing the SPMI extended
+ register space up into logical pieces, and set of fixed register
+ locations/definitions within these regions, with some of these regions
+ specifically used for interrupt handling.
+
+ The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are
+ interfaced to the chip via the SPMI (System Power Management Interface) bus.
+ Support for multiple independent functions are implemented by splitting the
+ 16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
+ each. A function can consume one or more of these fixed-size register regions.
+
+properties:
+ spmi_bus:
+ type: object
+ description: SPMI bus node
+
+patternProperties:
+ "^pmic@[0-9]$":
+ description: Child PMIC nodes
+ type: object
+
+ properties:
+ compatible:
+ items:
+ - enum:
+ # Sorted based on subtype ID the device reports
+ - qcom,pm8941
+ - qcom,pm8841
+ - qcom,pma8084
+ - qcom,pm8019
+ - qcom,pm8226
+ - qcom,pm8110
+ - qcom,pma8084
+ - qcom,pmi8962
+ - qcom,pmd9635
+ - qcom,pm8994
+ - qcom,pmi8994
+ - qcom,pm8916
+ - qcom,pm8004
+ - qcom,pm8909
+ - qcom,pm8950
+ - qcom,pmi8950
+ - qcom,pm8998
+ - qcom,pmi8998
+ - qcom,pm8005
+ - qcom,pm660l
+ - qcom,pm660
+
+ - enum:
+ - qcom,spmi-pmic
+
+ reg:
+ maxItems: 1
+ description:
+ Specifies the SPMI USID slave address for this device.
+ For more information see bindings/spmi/spmi.txt
+
+ patternProperties:
+ "@[0-9a-f]$":
+ description:
+ Each child node of SPMI slave id represents a function of the PMIC.
+ In the example below the rtc device node represents a peripheral of
+ pm8941 SID = 0. The regulator device node represents a peripheral of
+ pm8941 SID = 1.
+ type: object
+
+ properties:
+ interrupts:
+ maxItems: 4
+ description:
+ Interrupts are specified as a 4-tuple. For more information
+ see bindings/spmi/qcom,spmi-pmic-arb.txt
+
+ interrupt-names:
+ description:
+ Corresponding interrupt name to the interrupts property
+
+ required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/spmi/spmi.h>
+
+ spmi_bus {
+ compatible = "qcom,spmi-pmic-arb";
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ pmic@0 {
+ compatible = "qcom,pm8941";
+ reg = <0x0 SPMI_USID>;
+
+ rtc {
+ compatible = "qcom,rtc";
+ interrupts = <0x0 0x61 0x1 0x1>;
+ interrupt-names = "alarm";
+ };
+ };
+
+ pmic@1 {
+ compatible = "qcom,pm8941";
+ reg = <0x1 SPMI_USID>;
+
+ regulator {
+ compatible = "qcom,regulator";
+ regulator-name = "8941_boost";
+ };
+ };
+ };
+...
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
Powered by blists - more mailing lists