linux-kernel - RE: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI settings

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Message-ID: <DM5PR18MB14529A28A31785A574A4DEF5CAB49@DM5PR18MB1452.namprd18.prod.outlook.com>
Date:   Wed, 3 Feb 2021 14:37:22 +0000
From:   Kostya Porotchkin <kostap@...vell.com>
To:     Baruch Siach <baruch@...s.co.il>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "andrew@...n.ch" <andrew@...n.ch>,
        "jaz@...ihalf.com" <jaz@...ihalf.com>,
        "gregory.clement@...tlin.com" <gregory.clement@...tlin.com>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        Nadav Haklai <nadavh@...vell.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "Stefan Chulski" <stefanc@...vell.com>,
        "mw@...ihalf.com" <mw@...ihalf.com>,
        "Ben Peled" <bpeled@...vell.com>,
        "sebastian.hesselbarth@...il.com" <sebastian.hesselbarth@...il.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: RE: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
 settings

Hi, Baruch,

> -----Original Message-----
> From: Baruch Siach <baruch@...s.co.il>
> Sent: Wednesday, February 3, 2021 15:59
> To: Kostya Porotchkin <kostap@...vell.com>
> Cc: linux-kernel@...r.kernel.org; devicetree@...r.kernel.org;
> andrew@...n.ch; jaz@...ihalf.com; gregory.clement@...tlin.com;
> linux@...linux.org.uk; Nadav Haklai <nadavh@...vell.com>;
> robh+dt@...nel.org; Stefan Chulski <stefanc@...vell.com>;
> mw@...ihalf.com; Ben Peled <bpeled@...vell.com>;
> sebastian.hesselbarth@...il.com; linux-arm-kernel@...ts.infradead.org
> Subject: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
> settings
> 
> External Email
> 
> ----------------------------------------------------------------------
> Hi Konstantin,
> 
> On Wed, Feb 03 2021, kostap@...vell.com wrote:
> > From: Konstantin Porotchkin <kostap@...vell.com>
> >
> > Update the settings for AP806 SDHCI interface according to latest
> > Xenon drivers changes.
> > - no need to select the PHY slow mode anymore
> 
> Why? Has anything changed since the introduction of marvell,xenon-phy-slow-
> mode?
[KP] AP806 B0, AP807 and later do not need the "slow mode" set by the default.
The HWE-7296210 errata is not applicable to these components and they are able 
to run  AP SDHCI in HS400 8-bit mode.

Kosta
> 
> baruch
> 
> > -	 * Not stable in HS modes - phy needs "more calibration", so add
> > -	 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
> > -	 */
> > -	marvell,xenon-phy-slow-mode;
> >  	no-1-8-v;
> >  	no-sd;
> >  	no-sdio;
> > diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > index 12e477f1aeb9..edd6131a0587 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > +++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > @@ -257,7 +257,6 @@
> >  				clock-names = "core";
> >  				clocks = <&ap_clk 4>;
> >  				dma-coherent;
> > -				marvell,xenon-phy-slow-mode;
> >  				status = "disabled";
> >  			};
> 
> 
> --
>                                                      ~. .~   Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
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