linux-kernel - Re: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI settings

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Message-ID: <20210203143851.GR1463@shell.armlinux.org.uk>
Date:   Wed, 3 Feb 2021 14:38:52 +0000
From:   Russell King - ARM Linux admin <linux@...linux.org.uk>
To:     Kostya Porotchkin <kostap@...vell.com>
Cc:     Baruch Siach <baruch@...s.co.il>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "andrew@...n.ch" <andrew@...n.ch>,
        "jaz@...ihalf.com" <jaz@...ihalf.com>,
        "gregory.clement@...tlin.com" <gregory.clement@...tlin.com>,
        Nadav Haklai <nadavh@...vell.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        Stefan Chulski <stefanc@...vell.com>,
        "mw@...ihalf.com" <mw@...ihalf.com>,
        Ben Peled <bpeled@...vell.com>,
        "sebastian.hesselbarth@...il.com" <sebastian.hesselbarth@...il.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
 settings

On Wed, Feb 03, 2021 at 02:37:22PM +0000, Kostya Porotchkin wrote:
> Hi, Baruch,
> 
> > -----Original Message-----
> > From: Baruch Siach <baruch@...s.co.il>
> > Sent: Wednesday, February 3, 2021 15:59
> > To: Kostya Porotchkin <kostap@...vell.com>
> > Cc: linux-kernel@...r.kernel.org; devicetree@...r.kernel.org;
> > andrew@...n.ch; jaz@...ihalf.com; gregory.clement@...tlin.com;
> > linux@...linux.org.uk; Nadav Haklai <nadavh@...vell.com>;
> > robh+dt@...nel.org; Stefan Chulski <stefanc@...vell.com>;
> > mw@...ihalf.com; Ben Peled <bpeled@...vell.com>;
> > sebastian.hesselbarth@...il.com; linux-arm-kernel@...ts.infradead.org
> > Subject: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
> > settings
> > 
> > External Email
> > 
> > ----------------------------------------------------------------------
> > Hi Konstantin,
> > 
> > On Wed, Feb 03 2021, kostap@...vell.com wrote:
> > > From: Konstantin Porotchkin <kostap@...vell.com>
> > >
> > > Update the settings for AP806 SDHCI interface according to latest
> > > Xenon drivers changes.
> > > - no need to select the PHY slow mode anymore
> > 
> > Why? Has anything changed since the introduction of marvell,xenon-phy-slow-
> > mode?
> [KP] AP806 B0, AP807 and later do not need the "slow mode" set by the default.
> The HWE-7296210 errata is not applicable to these components and they are able 
> to run  AP SDHCI in HS400 8-bit mode.

So what about all those people, such as me, who have A0 silicon on their
Macchiatobin boards?

You can't just go around removing DT properties like this.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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