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Message-ID: <DM6PR02MB5386436F15C3855EA9697299AF639@DM6PR02MB5386.namprd02.prod.outlook.com>
Date: Wed, 24 Mar 2021 06:06:47 +0000
From: Srinivas Neeli <sneeli@...inx.com>
To: Guenter Roeck <linux@...ck-us.net>,
Michal Simek <michals@...inx.com>,
Shubhrajyoti Datta <shubhraj@...inx.com>,
Srinivas Goud <sgoud@...inx.com>
CC: "wim@...ux-watchdog.org" <wim@...ux-watchdog.org>,
"linux-watchdog@...r.kernel.org" <linux-watchdog@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
git <git@...inx.com>, Srinivas Goud <sgoud@...inx.com>
Subject: RE: [PATCH 2/9] watchdog: of_xilinx_wdt: Used BIT macro
Hi,
> -----Original Message-----
> From: Guenter Roeck <groeck7@...il.com> On Behalf Of Guenter Roeck
> Sent: Tuesday, March 16, 2021 7:53 AM
> To: Srinivas Neeli <sneeli@...inx.com>; Michal Simek <michals@...inx.com>;
> Shubhrajyoti Datta <shubhraj@...inx.com>; Srinivas Goud
> <sgoud@...inx.com>
> Cc: wim@...ux-watchdog.org; linux-watchdog@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; linux-kernel@...r.kernel.org; git
> <git@...inx.com>; Srinivas Goud <sgoud@...inx.com>
> Subject: Re: [PATCH 2/9] watchdog: of_xilinx_wdt: Used BIT macro
>
> On 3/15/21 3:46 AM, Srinivas Neeli wrote:
> > From: Srinivas Goud <srinivas.goud@...inx.com>
> >
> > Used BIT macro instead of mask value.
> >
> > Signed-off-by: Srinivas Goud <srinivas.goud@...inx.com>
> > Signed-off-by: Michal Simek <michal.simek@...inx.com>
> > Signed-off-by: Srinivas Neeli <srinivas.neeli@...inx.com>
> > ---
> > drivers/watchdog/of_xilinx_wdt.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/watchdog/of_xilinx_wdt.c
> > b/drivers/watchdog/of_xilinx_wdt.c
> > index 00549164b3d7..0d7df2370db7 100644
> > --- a/drivers/watchdog/of_xilinx_wdt.c
> > +++ b/drivers/watchdog/of_xilinx_wdt.c
> > @@ -24,12 +24,12 @@
> > #define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */
> >
> > /* Control/Status Register Masks */
> > -#define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */
> > -#define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */
> > -#define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */
> > +#define XWT_CSR0_WRS_MASK BIT(3) /* Reset status */
> > +#define XWT_CSR0_WDS_MASK BIT(2) /* Timer state */
> > +#define XWT_CSR0_EWDT1_MASK BIT(1) /* Enable bit 1 */
> >
> > /* Control/Status Register 0/1 bits */ -#define XWT_CSRX_EWDT2_MASK
> > 0x00000001 /* Enable bit 2 */
> > +#define XWT_CSRX_EWDT2_MASK BIT(0) /* Enable bit 2 */
> >
>
> Requires #include <linux/bits.h>
Will update in V2 series.
>
> > /* SelfTest constants */
> > #define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000
> >
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