linux-kernel - Re: [PATCH] Fixed typo in Documentation/x86/x86

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Message-ID: <2599991.mvXUDI8C0e@iron-maiden>
Date:   Tue, 27 Apr 2021 13:28:29 -0400
From:   bilbao@...edu
To:     Carlos Bilbao <bilbao@...edu>, tglx@...utronix.de,
        mingo@...hat.com, peterz@...radead.org, bp@...en8.de,
        x86@...nel.org, hpa@...or.com, linux-kernel@...r.kernel.org,
        Jonathan Corbet <corbet@....net>
Subject: Re: [PATCH] Fixed typo in Documentation/x86/x86_64/5level-paging.rst

Hello Jon, thanks a lot for your feedback, it was instructive. I attach changelog and the patch as plain text below. 

I fix two typos in the documentation (Documentation/x86/x86_64/5level-paging.rst), changing 'paing' for 
'paging' and using the right verbal form for plural on 'some vendors offer'. 

Signed-off-by: Carlos Bilbao <bilbao@...edu>
---
 Documentation/x86/x86_64/5level-paging.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/x86/x86_64/5level-paging.rst b/Documentation/x86/x86_64/5level-paging.rst
index 44856417e6a5..b792bbdc0b01 100644
--- a/Documentation/x86/x86_64/5level-paging.rst
+++ b/Documentation/x86/x86_64/5level-paging.rst
@@ -6,9 +6,9 @@
 
 Overview
 ========
-Original x86-64 was limited by 4-level paing to 256 TiB of virtual address
+Original x86-64 was limited by 4-level paging to 256 TiB of virtual address
 space and 64 TiB of physical address space. We are already bumping into
-this limit: some vendors offers servers with 64 TiB of memory today.
+this limit: some vendors offer servers with 64 TiB of memory today.
 
 To overcome the limitation upcoming hardware will introduce support for
 5-level paging. It is a straight-forward extension of the current page
-- 
2.25.1

On Tuesday, April 27, 2021 11:45:45 AM EDT Jonathan Corbet wrote:
> Carlos Bilbao <bilbao@...edu> writes:
> > Signed-off-by: Carlos Bilbao <bilbao@...edu>
> > ---
> > 
> >  Documentation/x86/x86_64/5level-paging.rst | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/Documentation/x86/x86_64/5level-paging.rst
> > b/Documentation/x86/x86_64/5level-paging.rst
> > index 44856417e6a5..b792bbdc0b01 100644
> > --- a/Documentation/x86/x86_64/5level-paging.rst
> > +++ b/Documentation/x86/x86_64/5level-paging.rst
> > @@ -6,9 +6,9 @@
> > 
> >  Overview
> >  ========
> > 
> > -Original x86-64 was limited by 4-level paing to 256 TiB of virtual
> > address
> > +Original x86-64 was limited by 4-level paging to 256 TiB of virtual
> > address> 
> >  space and 64 TiB of physical address space. We are already bumping into
> > 
> > -this limit: some vendors offers servers with 64 TiB of memory today.
> > +this limit: some vendors offer servers with 64 TiB of memory today.
> 
> So this seems like a good change, but I need to make a couple of
> requests:
> 
>  - Please include a changelog, even with relatively simple patches like
>    this.
> 
>  - Patches should be sent as plain text, inline in the mail - not as
>    attachments and *certainly* not as HTML.  Have a look at
>    Documentation/process/email-clients.rst if you need some guidance on
>    configuring your email setup.
> 
> Thanks,
> 
> jon