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Message-ID: <20211021073647.GA7580@workstation>
Date:   Thu, 21 Oct 2021 13:06:47 +0530
From:   Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To:     Prasad Malisetty <pmaliset@...eaurora.org>
Cc:     svarbanov@...sol.com, agross@...nel.org,
        bjorn.andersson@...aro.org, lorenzo.pieralisi@....com,
        linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org, vbadigan@...eaurora.org,
        kw@...ux.com, bhelgaas@...gle.com
Subject: Re: [PATCH v1] PCI: qcom: Fix incorrect register offset in pcie init

On Fri, Oct 15, 2021 at 12:28:49AM +0530, Prasad Malisetty wrote:
> In pcie_init_2_7_0 one of the register writes using incorrect offset
> as per the platform register definitions (PCIE_PARF_AXI_MSTR_WR_ADDR_HALT
> offset value should be 0x1A8 instead 0x178).
> Update the correct offset value for SDM845 platform.
> 
> fixes: ed8cc3b1 ("PCI: qcom: Add support for SDM845 PCIe controller")
> 
> Signed-off-by: Prasad Malisetty <pmaliset@...eaurora.org>

After incorporating the reviews from Bjorn H,

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>

Thanks,
Mani

> ---
>  drivers/pci/controller/dwc/pcie-qcom.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 8a7a300..5bce152 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1230,9 +1230,9 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie)
>  	writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
>  
>  	if (IS_ENABLED(CONFIG_PCI_MSI)) {
> -		val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT);
> +		val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
>  		val |= BIT(31);
> -		writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT);
> +		writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
>  	}
>  
>  	return 0;
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

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