linux-kernel - RE: [PATCH v18 2/4] dmaengine: tegra: Add tegra gpcdma driver

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Message-ID: <DM5PR12MB18509939C17ABEB5EEA825FFC0289@DM5PR12MB1850.namprd12.prod.outlook.com>
Date:   Thu, 3 Feb 2022 03:44:25 +0000
From:   Akhil R <akhilrajeev@...dia.com>
To:     Dmitry Osipenko <digetx@...il.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Krishna Yarlagadda <kyarlagadda@...dia.com>,
        Laxman Dewangan <ldewangan@...dia.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        Rajesh Gumasta <rgumasta@...dia.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "thierry.reding@...il.com" <thierry.reding@...il.com>,
        "vkoul@...nel.org" <vkoul@...nel.org>
CC:     Pavan Kunapuli <pkunapuli@...dia.com>
Subject: RE: [PATCH v18 2/4] dmaengine: tegra: Add tegra gpcdma driver

> ....
> > +static int tegra_dma_pause(struct tegra_dma_channel *tdc)
> > +{
> > +     int ret;
> > +     u32 val;
> > +
> > +     val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE);
> > +     val |= TEGRA_GPCDMA_CHAN_CSRE_PAUSE;
> > +     tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);
> > +
> > +     /* Wait until busy bit is de-asserted */
> > +     ret = readl_relaxed_poll_timeout_atomic(tdc->tdma->base_addr +
> > +                     tdc->chan_base_offset + TEGRA_GPCDMA_CHAN_STATUS,
> > +                     val,
> > +                     !(val & TEGRA_GPCDMA_STATUS_BUSY),
> > +                     TEGRA_GPCDMA_BURST_COMPLETE_TIME,
> > +                     TEGRA_GPCDMA_BURST_COMPLETION_TIMEOUT);
> > +
> > +     return ret;
> > +}
> > +
> > +static int tegra_dma_device_pause(struct dma_chan *dc)
> > +{
> > +     struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
> > +     unsigned long flags;
> > +     int ret = 0;
> > +
> > +     if (!tdc->tdma->chip_data->hw_support_pause)
> > +             return -ENOSYS;
> > +
> > +     spin_lock_irqsave(&tdc->vc.lock, flags);
> > +     ret = tegra_dma_pause(tdc);
> > +     if (ret)
> > +             dev_err(tdc2dev(tdc), "DMA pause timed out\n");
> 
> Why error message shouldn't be printed by tegra_dma_terminate_all()?
> 
> The error message should be placed inside of tegra_dma_pause().
Okay. Agreed.
> 
> ...
> > +static int tegra_dma_stop_client(struct tegra_dma_channel *tdc)
> > +{
> > +     int ret;
> > +     unsigned long status;
> > +     u32 csr = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR);
> > +
> > +     /*
> > +      * Change the client associated with the DMA channel
> > +      * to stop DMA engine from starting any more bursts for
> > +      * the given client and wait for in flight bursts to complete
> > +      */
> > +     csr &= ~(TEGRA_GPCDMA_CSR_REQ_SEL_MASK);
> > +     csr |= TEGRA_GPCDMA_CSR_REQ_SEL_UNUSED;
> > +     tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr);
> > +
> > +     /* Wait for in flight data transfer to finish */
> > +     udelay(TEGRA_GPCDMA_BURST_COMPLETE_TIME);
> > +
> > +     /* If TX/RX path is still active wait till it becomes
> > +      * inactive
> > +      */
> > +
> > +     ret = readl_relaxed_poll_timeout_atomic(tdc->tdma->base_addr +
> > +                             tdc->chan_base_offset +
> > +                             TEGRA_GPCDMA_CHAN_STATUS,
> > +                             status,
> > +                             !(status & (TEGRA_GPCDMA_STATUS_CHANNEL_TX |
> > +                             TEGRA_GPCDMA_STATUS_CHANNEL_RX)),
> > +                             5,
> > +                             TEGRA_GPCDMA_BURST_COMPLETION_TIMEOUT);
> > +     if (ret) {
> > +             dev_err(tdc2dev(tdc), "Timeout waiting for DMA burst
> completion!\n");
> > +             tegra_dma_dump_chan_regs(tdc);
> > +     }
> > +
> > +     return ret;
> > +}
> > +
> > +static int tegra_dma_terminate_all(struct dma_chan *dc)
> > +{
> > +     struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
> > +     unsigned long flags;
> > +     LIST_HEAD(head);
> > +     int err;
> > +
> > +     spin_lock_irqsave(&tdc->vc.lock, flags);
> > +
> > +     if (tdc->dma_desc) {
> > +             err = tdc->tdma->chip_data->hw_support_pause ?
> > +                   tegra_dma_pause(tdc) :
> > +                   tegra_dma_stop_client(tdc);
> 
> The canonical coding style is:
> 
> if (tdc->tdma->chip_data->hw_support_pause)
>         err = tegra_dma_pause(tdc);
> else
>         err = tegra_dma_stop_client(tdc);
> 
Okay.
> 
> But why do you need to pause at all here and can't use
> tegra_dma_stop_client() even if pause is supported?

The recommended method to terminate a transfer in
between is to pause the channel first and then disable it.
This is more graceful and stable for the hardware.
stop_client() is more abrupt, though it does the job.

Thanks,
Akhil