linux-kernel - Re: [PATCH 1/2] PCI: xilinx-cpm: Update YAML schemas for Versal CPM5 Root Port

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Message-ID: <20220207182806.GA408432@bhelgaas>
Date:   Mon, 7 Feb 2022 12:28:06 -0600
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
Cc:     linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        lorenzo.pieralisi@....com, bhelgaas@...gle.com, michals@...inx.com
Subject: Re: [PATCH 1/2] PCI: xilinx-cpm: Update YAML schemas for Versal CPM5
 Root Port

It looks like the subject line convention here would be something
like:

  dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root Port

(From "git log --oneline Documentation/devicetree/bindings/pci/")

On Mon, Feb 07, 2022 at 09:42:48AM +0530, Bharat Kumar Gogada wrote:
> Xilinx Versal Premium series has CPM5 block which supports Root port
> functioning at Gen5 speed.
> Add support for YAML schemas documentation for Versal CPM5 Root Port driver.

s/Root port/Root Port/ to be consistent.
Add blank line between paragraphs.

Bjorn