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Message-ID: <CAK8P3a2D8Yv+KpM4NJyP9mosieqbhHh08=mdEy+OA84Vx6FVCQ@mail.gmail.com>
Date:   Fri, 18 Feb 2022 17:43:04 +0100
From:   Arnd Bergmann <arnd@...db.de>
To:     Pali Rohár <pali@...nel.org>
Cc:     Gregory Clement <gregory.clement@...tlin.com>,
        Andrew Lunn <andrew@...n.ch>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Marek Behún <kabel@...nel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        DTML <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] arm64: dts: marvell: armada-37xx: Increase PCIe IO size
 from 64 KiB to 1 MiB

On Thu, Jan 13, 2022 at 6:07 PM Pali Rohár <pali@...nel.org> wrote:
>
> Commit 514ef1e62d65 ("arm64: dts: marvell: armada-37xx: Extend PCIe MEM
> space") increased size of PCIe MEM to 127 MiB, which is the maximal
> possible size for allocated 128 MiB PCIe window. PCIe IO size in that
> commit was unchanged.
>
> Armada 3720 PCIe controller supports 32-bit IO space mapping so it is
> possible to assign more than 64 KiB if address space for IO.
>
> Currently controller has assigned 127 MiB + 64 KiB memory and therefore
> there is 960 KiB of unused memory. So assign it to IO space by increasing
> IO window from 64 KiB to 1 MiB.
>
> DTS file armada-3720-turris-mox.dts already uses whole 128 MiB space, so
> only update comment about 32-bit IO space mapping.
>
> Signed-off-by: Pali Rohár <pali@...nel.org>
> Fixes: 514ef1e62d65 ("arm64: dts: marvell: armada-37xx: Extend PCIe MEM space")

I just saw this is the fixes pull request, and it seems very odd. Does this
fix an actual bug? Note that Linux normally doesn't map more than 64KB
of I/O space per PCI domain, so it should not make a difference to us.

Also, note that having a high bus address for the I/O space (0xefff0000,
as as the CPU physical address here) means that a lot of the older
devices that actually require I/O space won't work, because they need a
low bus address in the first few KB.

Is this mapping a requirement from a broken bootloader, or can you change
the mapping of the I/O port window in the physical space to the usual
bus address 0?

        Arnd

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