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Message-ID: <97cf98c598a04b77bb6de6e91fcdcc0b@cqplus1.com>
Date: Mon, 28 Feb 2022 06:31:47 +0000
From: qinjian[覃健] <qinjian@...lus1.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>
CC: "mturquette@...libre.com" <mturquette@...libre.com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"maz@...nel.org" <maz@...nel.org>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
"linux@...linux.org.uk" <linux@...linux.org.uk>,
"broonie@...nel.org" <broonie@...nel.org>,
"arnd@...db.de" <arnd@...db.de>,
"stefan.wahren@...e.com" <stefan.wahren@...e.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
Wells Lu 呂芳騰 <wells.lu@...plus.com>,
Rob Herring <robh@...nel.org>
Subject: RE: [PATCH v9 05/10] dt-bindings: clock: Add bindings for SP7021
clock driver
> > +examples:
> > + - |
> > + clkc: clock-controller@...00000 {
> > + compatible = "sunplus,sp7021-clkc";
> > + #clock-cells = <1>;
> > + reg = <0x9c000000 0x280>;
> > + clocks = <&extclk>, <&clkc PLL_SYS>;
>
> Except the warning pointed out by Rob's bot, it looks like you feed this
> clock-controller with a clock from itself. Is there a point to express
> it in DTS at all?
Yes, pllsys is an internal clock, but it also as a parent clock for some other
clocks in this clock-controller.
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