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Date:   Mon, 7 Mar 2022 15:45:06 +0200
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     shruthi.sanil@...el.com
Cc:     daniel.lezcano@...aro.org, tglx@...utronix.de, robh+dt@...nel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        mgross@...ux.intel.com, srikanth.thokala@...el.com,
        lakshmi.bai.raja.subramanian@...el.com,
        mallikarjunappa.sangannavar@...el.com
Subject: Re: [PATCH v9 2/2] clocksource: Add Intel Keem Bay timer support

On Mon, Mar 07, 2022 at 05:01:47PM +0530, shruthi.sanil@...el.com wrote:
> From: Shruthi Sanil <shruthi.sanil@...el.com>
> 
> The Intel Keem Bay timer driver supports clocksource and clockevent
> features for the timer IP used in Intel Keem Bay SoC.
> The timer block supports 1 free running counter and 8 timers.
> The free running counter can be used as a clocksource and
> the timers can be used as clockevent. Each timer is capable of
> generating individual interrupt.
> Both the features are enabled through the timer general config register.

...

> +		pr_err("%pOF: FW_BUG: Prescaler is not enabled\n", np);

FW_BUG is a macro. The above is an incorrect use of it.

...

> +		pr_err("%pOF: FW_BUG: free running counter is not enabled\n", np);

Ditto.

-- 
With Best Regards,
Andy Shevchenko


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