linux-kernel - Re: [PATCH] drm/amdgpu: Fix code with incorrect enum type

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CADnq5_NXzEzo=6adPQzEBrAGtWfegyvi=yGHVVOsb+3r9OiNaQ@mail.gmail.com>
Date:   Thu, 7 Apr 2022 13:46:05 -0400
From:   Alex Deucher <alexdeucher@...il.com>
To:     Christian König <ckoenig.leichtzumerken@...il.com>
Cc:     Grigory Vasilyev <h0tc0d3@...il.com>,
        Rodrigo Siqueira <Rodrigo.Siqueira@....com>,
        Melissa Wen <mwen@...lia.com>, Daniel Vetter <daniel@...ll.ch>,
        Guchun Chen <guchun.chen@....com>,
        David Airlie <airlied@...ux.ie>,
        "Pan, Xinhui" <Xinhui.Pan@....com>,
        LKML <linux-kernel@...r.kernel.org>,
        amd-gfx list <amd-gfx@...ts.freedesktop.org>,
        Maling list - DRI developers 
        <dri-devel@...ts.freedesktop.org>,
        Joseph Greathouse <Joseph.Greathouse@....com>,
        Alex Deucher <alexander.deucher@....com>,
        Evan Quan <evan.quan@....com>,
        Christian König <christian.koenig@....com>
Subject: Re: [PATCH] drm/amdgpu: Fix code with incorrect enum type

On Thu, Apr 7, 2022 at 2:21 AM Christian König
<ckoenig.leichtzumerken@...il.com> wrote:
>
> Am 06.04.22 um 18:50 schrieb Grigory Vasilyev:
> > Instead of the 'amdgpu_ring_priority_level' type,
> > the 'amdgpu_gfx_pipe_priority' type was used,
> > which is an error when setting ring priority.
> > This is a minor error, but may cause problems in the future.
> >
> > Instead of AMDGPU_RING_PRIO_2 = 2, we can use AMDGPU_RING_PRIO_MAX = 3,
> > but AMDGPU_RING_PRIO_2 = 2 is used for compatibility with
> > AMDGPU_GFX_PIPE_PRIO_HIGH = 2, and not change the behavior of the
> > code.
> >
> > Signed-off-by: Grigory Vasilyev <h0tc0d3@...il.com>
>
> Good catch, Acked-by: Christian König <christian.koenig@....com>
>
> > ---
> >   drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > index 5554084ec1f1..9bc26395f833 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > @@ -1929,7 +1929,7 @@ static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
> >               + ring->pipe;
> >
> >       hw_prio = amdgpu_gfx_is_high_priority_compute_queue(adev, ring) ?
> > -                     AMDGPU_GFX_PIPE_PRIO_HIGH : AMDGPU_RING_PRIO_DEFAULT;
> > +                     AMDGPU_RING_PRIO_2 : AMDGPU_RING_PRIO_DEFAULT;

gfx_v8_0.c, gfx_v9_0.c, gfx_v10_0.c all do this.  Care to fix them all up?

Alex

> >       /* type-2 packets are deprecated on MEC, use type-3 instead */
> >       r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, irq_type,
> >                            hw_prio, NULL);
>