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Message-ID: <OSBPR01MB20375064F05D713766BF210D80F79@OSBPR01MB2037.jpnprd01.prod.outlook.com>
Date:   Fri, 22 Apr 2022 12:01:30 +0000
From:   "tarumizu.kohei@...itsu.com" <tarumizu.kohei@...itsu.com>
To:     'Dave Hansen' <dave.hansen@...el.com>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will@...nel.org" <will@...nel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "bp@...en8.de" <bp@...en8.de>,
        "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
        "x86@...nel.org" <x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "fenghua.yu@...el.com" <fenghua.yu@...el.com>,
        "reinette.chatre@...el.com" <reinette.chatre@...el.com>
Subject: RE: [PATCH v3 6/9] x86: resctrl: pseudo_lock: Fix to restore to
 original value when re-enabling hardware prefetch register

Thanks for the comment.

> It would be nice to mention that the wrmsr()'s in this patch are only done inside of
> an interrupt-disabled region.  Without that little tidbit of information, it's not
> obviously correct that the smp_call_function() in patch 8/9 is correct.

I would like to add description that the wrmsr()'s in this patch are
only done inside of an interrupt-disabled region.
 
> The x86 code here looks reasonable otherwise.  It's a little bit of a shame that
> this is *ONLY* for BROADWELL_X for now, but I assume you were just
> conservative about it because that's all you have to test on.

That's right. It is possible to implement for other models based on
information provided by the Intel SDM. However, I didn't implement it
because I can test immediately with BROADWELL_X only.

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