| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Wed, 11 May 2022 22:13:24 +0200
From: Jernej Škrabec <jernej.skrabec@...il.com>
To: linux-sunxi@...ts.linux.dev, qianfanguijin@....com
Cc: Rob Herring <robh+dt@...nel.org>,
Maxime Ripard <mripard@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
qianfan Zhao <qianfanguijin@....com>
Subject: Re: [PATCH v2] drivers: cpufreq: sun8i-r40: Add cpufreq support
Dne torek, 10. maj 2022 ob 02:36:11 CEST je qianfanguijin@....com napisal(a):
> From: qianfan Zhao <qianfanguijin@....com>
>
> OPP table value is get from allwinner lichee 3.10 kernel.
> And completed 'cpu-supply' on sun8i based board.
>
> Signed-off-by: qianfan Zhao <qianfanguijin@....com>
> ---
> .../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 4 ++
> arch/arm/boot/dts/sun8i-r40-feta40i.dtsi | 4 ++
> arch/arm/boot/dts/sun8i-r40.dtsi | 47 +++++++++++++++++++
> arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts | 4 ++
> .../boot/dts/sun8i-v40-bananapi-m2-berry.dts | 4 ++
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
This patch needs to be split in two:
1. driver change
2. DT changes
And please add change log here for next submission.
> 6 files changed, 64 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/
boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> index a6a1087a0c9b..4f30018ec4a2 100644
> --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> @@ -113,6 +113,10 @@ &ahci {
> status = "okay";
> };
>
> +&cpu0 {
> + cpu-supply = <®_dcdc2>;
> +};
> +
> &de {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi b/arch/arm/boot/dts/
sun8i-r40-feta40i.dtsi
> index 265e0fa57a32..b872b51a346d 100644
> --- a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi
> @@ -6,6 +6,10 @@
>
> #include "sun8i-r40.dtsi"
>
> +&cpu0 {
> + cpu-supply = <®_dcdc2>;
> +};
> +
> &i2c0 {
> status = "okay";
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-
r40.dtsi
> index 291f4784e86c..90de119095fa 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -54,6 +54,41 @@ / {
> #size-cells = <1>;
> interrupt-parent = <&gic>;
>
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-720000000 {
> + opp-hz = /bits/ 64 <720000000>;
> + opp-microvolt = <1000000 1000000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-912000000 {
> + opp-hz = /bits/ 64 <912000000>;
> + opp-microvolt = <1100000 1100000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1008000000 {
> + opp-hz = /bits/ 64 <1008000000>;
> + opp-microvolt = <1160000 1160000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1104000000 {
> + opp-hz = /bits/ 64 <1104000000>;
> + opp-microvolt = <1240000 1240000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1200000000 {
> + opp-hz = /bits/ 64 <1200000000>;
> + opp-microvolt = <1300000 1300000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> + };
> +
> clocks {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -84,24 +119,36 @@ cpu0: cpu@0 {
> compatible = "arm,cortex-a7";
> device_type = "cpu";
> reg = <0>;
> + clocks = <&ccu CLK_CPU>;
> + clock-names = "cpu";
> + operating-points-v2 = <&cpu0_opp_table>;
> };
>
> cpu1: cpu@1 {
> compatible = "arm,cortex-a7";
> device_type = "cpu";
> reg = <1>;
> + clocks = <&ccu CLK_CPU>;
> + clock-names = "cpu";
> + operating-points-v2 = <&cpu0_opp_table>;
> };
>
> cpu2: cpu@2 {
> compatible = "arm,cortex-a7";
> device_type = "cpu";
> reg = <2>;
> + clocks = <&ccu CLK_CPU>;
> + clock-names = "cpu";
> + operating-points-v2 = <&cpu0_opp_table>;
> };
>
> cpu3: cpu@3 {
> compatible = "arm,cortex-a7";
> device_type = "cpu";
> reg = <3>;
> + clocks = <&ccu CLK_CPU>;
> + clock-names = "cpu";
> + operating-points-v2 = <&cpu0_opp_table>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/boot/dts/
sun8i-t3-cqa3t-bv3.dts
> index 6931aaab2382..0eb1990742ff 100644
> --- a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts
> +++ b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts
> @@ -88,6 +88,10 @@ &ahci {
> status = "okay";
> };
>
> +&cpu0 {
> + cpu-supply = <®_dcdc2>;
> +};
> +
> &de {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/
boot/dts/sun8i-v40-bananapi-m2-berry.dts
> index 47954551f573..fdf8bd12faaa 100644
> --- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
> +++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
> @@ -107,6 +107,10 @@ &ahci {
> status = "okay";
> };
>
> +&cpu0 {
> + cpu-supply = <®_dcdc2>;
> +};
> +
> &de {
> status = "okay";
> };
> diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-
dt-platdev.c
> index ca1d103ec449..971a99219d4d 100644
> --- a/drivers/cpufreq/cpufreq-dt-platdev.c
> +++ b/drivers/cpufreq/cpufreq-dt-platdev.c
> @@ -26,6 +26,7 @@ static const struct of_device_id allowlist[] __initconst =
{
> { .compatible = "allwinner,sun8i-a23", },
> { .compatible = "allwinner,sun8i-a83t", },
> { .compatible = "allwinner,sun8i-h3", },
> + { .compatible = "allwinner,sun8i-r40", },
Why on allow list? Comment says operatings-point-v2 should be on block list,
just like H6.
Best regards,
Jernej
>
> { .compatible = "apm,xgene-shadowcat", },
>
> --
> 2.25.1
>
>
Powered by blists - more mailing lists