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Message-ID: <509669b26b5899088e9b77ed94d103ee@walle.cc>
Date: Fri, 15 Jul 2022 08:47:00 +0200
From: Michael Walle <michael@...le.cc>
To: Sherry Sun <sherry.sun@....com>
Cc: gregkh@...uxfoundation.org, jirislaby@...nel.org,
linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-imx@....com
Subject: Re: [PATCH 2/2] tty: serial: fsl_lpuart: writing a 1 and then a 0 to
trigger a break character
Hi,
Am 2022-07-15 04:59, schrieb Sherry Sun:
> According to the lpuart reference manual, need to writing a 1 and then
> a
> 0 to the UARTCTRL_SBK field queues a break character in the transmit
> data stream. Only writing a 1 cannot trigger the break character, so
> fix
> it.
I don't think this is correct. The tty core will already call this:
.break_ctl(port, 1)
usleep()
.break_ctl(port, 0)
So you'll have your 1->0 transition.
My RM from the LS1028A says the following:
| Writing a 1 and then a 0 to SBK queues a break character in the
| transmit data stream. Additional break characters of 10 to 13,
| or 13 to 16 if LPUART_STATBRK13] is set, bit times of logic 0
| are queued as long as SBK is set. Depending on the timing of
| the set and clear of SBK relative to the information currently
| being transmitted, a second break character may be queued
| before software clears SBK.
To me it seems that setting the SBK bit just pulls the TX line
low and releasing it will return to normal transmitter mode.
-michael
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