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Message-ID: <b47185a6-07aa-d159-2bce-aa84be9d0abe@linaro.org>
Date:   Tue, 26 Jul 2022 15:49:17 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Sibi Sankar <quic_sibis@...cinc.com>,
        Steev Klimaszewski <steev@...i.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Georgi Djakov <djakov@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     Rajendra Nayak <quic_rjendra@...cinc.com>
Subject: Re: [PATCH 10/10] arm64: dts: qcom: sdm845: add LLCC BWMON

On 26/07/2022 14:01, Sibi Sankar wrote:
>>>> I think you may be right; I just applied this patchset to -next
>>>> (20220722) and i do not see the error message there.  On my 5.19-rc7
>>>> tree, i am also testing a patchset that enables qcom devices to access
>>>> efivars, so possibly we are ending up in secure world there?
>>>
>>> Actually mapping of IO space should not touch secure world, so this was
>>> a long shot assuming you test it on the next.
>>>
>>
>> The memory region specified in device tree overlaps with the llcc system
>> cache controller node. Steev probably had the QCOM_LLCC config enabled 
>> when he tested it out on his branch.
> 
>  From what I see we can probably get away with restricting the llcc_base
> reg region to just llcc0_common region and leave the lcc-bwmon as is.

Och, that IO mapping for llcc is quite big. I'll try that.


Best regards,
Krzysztof

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