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Message-ID: <Yuz5RzEhwWa7xqlR@sirena.org.uk>
Date:   Fri, 5 Aug 2022 12:04:39 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor.dooley@...rochip.com, linux-spi@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Valentina.FernandezAlanis@...rochip.com
Subject: Re: [PATCH v3 4/4] MAINTAINERS: add qspi to Polarfire SoC entry

On Fri, Aug 05, 2022 at 08:50:37AM +0200, Krzysztof Kozlowski wrote:
> On 05/08/2022 07:30, Naga Sureshkumar Relli wrote:
> > Add the qspi driver to existing Polarfire SoC entry.
> > 
> > Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
> > Acked-by: Conor Dooley <conor.dooley@...rochip.com>

> This should be squashed with previous patch.

It's perfectly fine to have a separate patch for MAINTAINERS like this.

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