linux-kernel - Re: [PATCH v3 4/4] MAINTAINERS: add qspi to Polarfire SoC entry

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 5 Aug 2022 12:05:49 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
Cc:     robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor.dooley@...rochip.com, linux-spi@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Valentina.FernandezAlanis@...rochip.com
Subject: Re: [PATCH v3 4/4] MAINTAINERS: add qspi to Polarfire SoC entry

On Fri, Aug 05, 2022 at 11:00:19AM +0530, Naga Sureshkumar Relli wrote:
> Add the qspi driver to existing Polarfire SoC entry.

> +++ b/MAINTAINERS
> @@ -17146,6 +17146,7 @@ S:	Supported
>  F:	arch/riscv/boot/dts/microchip/
>  F:	drivers/mailbox/mailbox-mpfs.c
>  F:	drivers/soc/microchip/
> +F:	drivers/spi/spi-microchip-core-qspi.c
>  F:	drivers/spi/spi-microchip-core.c
>  F:	include/soc/microchip/mpfs.h

You should also add a pattern for the DT binding here.

Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)