linux-kernel - Re: [PATCH v3 4/4] MAINTAINERS: add qspi to Polarfire SoC entry

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Message-ID: <Yuz5jZlRLr3pBCcb@sirena.org.uk>
Date:   Fri, 5 Aug 2022 12:05:49 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
Cc:     robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor.dooley@...rochip.com, linux-spi@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Valentina.FernandezAlanis@...rochip.com
Subject: Re: [PATCH v3 4/4] MAINTAINERS: add qspi to Polarfire SoC entry

On Fri, Aug 05, 2022 at 11:00:19AM +0530, Naga Sureshkumar Relli wrote:
> Add the qspi driver to existing Polarfire SoC entry.

> +++ b/MAINTAINERS
> @@ -17146,6 +17146,7 @@ S:	Supported
>  F:	arch/riscv/boot/dts/microchip/
>  F:	drivers/mailbox/mailbox-mpfs.c
>  F:	drivers/soc/microchip/
> +F:	drivers/spi/spi-microchip-core-qspi.c
>  F:	drivers/spi/spi-microchip-core.c
>  F:	include/soc/microchip/mpfs.h

You should also add a pattern for the DT binding here.

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