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Message-ID: <e77a66f2-f572-0960-3f6a-68ca9773a719@huawei.com>
Date: Thu, 8 Sep 2022 09:34:00 +0100
From: John Garry <john.garry@...wei.com>
To: Nick Forrington <nick.forrington@....com>,
<linux-kernel@...r.kernel.org>, <linux-perf-users@...r.kernel.org>,
<acme@...nel.org>
CC: Will Deacon <will@...nel.org>, James Clark <james.clark@....com>,
"Mike Leach" <mike.leach@...aro.org>, Leo Yan <leo.yan@...aro.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
"Namhyung Kim" <namhyung@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2] perf vendor events: Update events for Neoverse E1
On 07/09/2022 16:49, Nick Forrington wrote:
> These CPUs contain the same PMU events (as per the Arm Technical
> Reference manuals for Cortex A65 and Neoverse E1)
>
> This de-duplicates event data, and avoids issues in previous E1 event
> data (not present in A65 data)
> * Missing implementation defined events
> * Inclusion of events that are not implemented:
> - L1D_CACHE_ALLOCATE
> - SAMPLE_POP
> - SAMPLE_FEED
> - SAMPLE_FILTRATE
> - SAMPLE_COLLISION
>
> Signed-off-by: Nick Forrington <nick.forrington@....com>
Reviewed-by: John Garry <john.garry@...wei.com>
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