linux-kernel - Re: [PATCH RESEND v2 5/5] clk: mxl: Add a missing flag to allow parent clock rate change

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Message-ID: <MN2PR19MB36934441D5D78B03E03DD81AB1579@MN2PR19MB3693.namprd19.prod.outlook.com>
Date:   Thu, 29 Sep 2022 05:46:57 +0000
From:   Rahul Tanwar <rtanwar@...linear.com>
To:     Stephen Boyd <sboyd@...nel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "mturquette@...libre.com" <mturquette@...libre.com>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        linux-lgm-soc <linux-lgm-soc@...linear.com>
Subject: Re: [PATCH RESEND v2 5/5] clk: mxl: Add a missing flag to allow
 parent clock rate change

On 29/9/2022 8:18 am, Stephen Boyd wrote:
> This email was sent from outside of MaxLinear.
> 
> 
> Quoting Rahul Tanwar (2022-09-21 23:24:28)
>> One of the clock entry "dcl" clk's rate can only be changed by
>> changing its parent's clock rate. But it was missing to have
>> CLK_SET_RATE_PARENT flag as enabled.
>>
>> Add/enable CLK_SET_RATE_PARENT flag for dcl clk in order to
>> allow its clk rate to be changed via its parent's clk.
>>
>> Signed-off-by: Rahul Tanwar <rtanwar@...linear.com>
>> ---
> 
> Any Fixes tag?
> 


Missed it, will add in v3.

Thanks,
Rahul


>