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Message-ID: <070a4442-6fd0-c63c-65d9-caca18eea20a@pengutronix.de>
Date: Fri, 30 Sep 2022 09:46:14 +0100
From: Ahmad Fatoum <a.fatoum@...gutronix.de>
To: Richard Zhu <hongxing.zhu@....com>, vkoul@...nel.org,
p.zabel@...gutronix.de, l.stach@...gutronix.de,
bhelgaas@...gle.com, lorenzo.pieralisi@....com, robh@...nel.org,
shawnguo@...nel.org, alexander.stein@...tq-group.com,
marex@...x.de, richard.leitner@...ux.dev
Cc: devicetree@...r.kernel.org, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-imx@....com,
kernel@...gutronix.de, linux-phy@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v10 4/4] phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY
support
Hi,
On 29.09.22 09:37, Richard Zhu wrote:
> Add i.MX8MP PCIe PHY support.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> Signed-off-by: Lucas Stach <l.stach@...gutronix.de>
> Tested-by: Marek Vasut <marex@...x.de>
> Tested-by: Richard Leitner <richard.leitner@...data.com>
> Tested-by: Alexander Stein <alexander.stein@...tq-group.com>
> Reviewed-by: Lucas Stach <l.stach@...gutronix.de>
> ---
> drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 23 ++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
> index 59b46a4ae069..be5e48864c5a 100644
> --- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
> +++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
> @@ -48,6 +48,7 @@
>
> enum imx8_pcie_phy_type {
> IMX8MM,
> + IMX8MP,
> };
>
> struct imx8_pcie_phy_drvdata {
> @@ -60,6 +61,7 @@ struct imx8_pcie_phy {
> struct clk *clk;
> struct phy *phy;
> struct regmap *iomuxc_gpr;
> + struct reset_control *perst;
> struct reset_control *reset;
> u32 refclk_pad_mode;
> u32 tx_deemph_gen1;
> @@ -87,6 +89,9 @@ static int imx8_pcie_phy_init(struct phy *phy)
> writel(imx8_phy->tx_deemph_gen2,
> imx8_phy->base + PCIE_PHY_TRSV_REG6);
> break;
> + case IMX8MP:
> + reset_control_assert(imx8_phy->perst);
> + break;
> }
>
> if (pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ||
> @@ -141,6 +146,9 @@ static int imx8_pcie_phy_init(struct phy *phy)
> IMX8MM_GPR_PCIE_CMN_RST);
>
> switch (imx8_phy->drvdata->variant) {
> + case IMX8MP:
> + reset_control_deassert(imx8_phy->perst);
> + fallthrough;
> case IMX8MM:
> reset_control_deassert(imx8_phy->reset);
> usleep_range(200, 500);
> @@ -181,8 +189,14 @@ static const struct imx8_pcie_phy_drvdata imx8mm_drvdata = {
> .gpr = "fsl,imx8mm-iomuxc-gpr",
> };
>
> +static const struct imx8_pcie_phy_drvdata imx8mp_drvdata = {
> + .variant = IMX8MP,
> + .gpr = "fsl,imx8mp-iomuxc-gpr",
> +};
> +
> static const struct of_device_id imx8_pcie_phy_of_match[] = {
> {.compatible = "fsl,imx8mm-pcie-phy", .data = &imx8mm_drvdata, },
> + {.compatible = "fsl,imx8mp-pcie-phy", .data = &imx8mp_drvdata, },
> { },
> };
> MODULE_DEVICE_TABLE(of, imx8_pcie_phy_of_match);
> @@ -238,6 +252,15 @@ static int imx8_pcie_phy_probe(struct platform_device *pdev)
> return PTR_ERR(imx8_phy->reset);
> }
>
> + if (imx8_phy->drvdata->variant == IMX8MP) {
> + imx8_phy->perst =
> + devm_reset_control_get_exclusive(dev, "perst");
> + if (IS_ERR(imx8_phy->perst)) {
> + dev_err(dev, "Failed to get PCIE PHY PERST control\n");
> + return PTR_ERR(imx8_phy->perst);
Nitpick: dev_err_probe here would be useful if user forgets to
enable PHY driver. Anyways:
Reviewed-by: Ahmad Fatoum <a.fatoum@...gutronix.de>
Cheers,
Ahmad
> + }
> + }
> +
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> imx8_phy->base = devm_ioremap_resource(dev, res);
> if (IS_ERR(imx8_phy->base))
--
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