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Message-ID: <Y1DHb66VYPzFlTwh@sol.localdomain>
Date: Wed, 19 Oct 2022 20:58:39 -0700
From: Eric Biggers <ebiggers@...nel.org>
To: Tianjia Zhang <tianjia.zhang@...ux.alibaba.com>
Cc: Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>,
Jussi Kivilinna <jussi.kivilinna@....fi>,
Ard Biesheuvel <ardb@...nel.org>,
Mark Brown <broonie@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
linux-crypto@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com
Subject: Re: [PATCH v2 12/15] crypto: arm64/sm4 - add CE implementation for
ESSIV mode
On Tue, Oct 18, 2022 at 03:10:03PM +0800, Tianjia Zhang wrote:
> This patch is a CE-optimized assembly implementation for ESSIV mode.
> The assembly part is realized by reusing the CBC mode.
>
> Signed-off-by: Tianjia Zhang <tianjia.zhang@...ux.alibaba.com>
Is there still a use case for CBC-ESSIV mode these days, now that everyone is
using XTS instead?
- Eric
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