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Date:   Tue, 1 Nov 2022 15:04:20 +0000
From:   <Tharunkumar.Pasumarthi@...rochip.com>
To:     <andy.shevchenko@...il.com>
CC:     <Kumaravel.Thiagarajan@...rochip.com>,
        <gregkh@...uxfoundation.org>, <jirislaby@...nel.org>,
        <ilpo.jarvinen@...ux.intel.com>, <u.kleine-koenig@...gutronix.de>,
        <johan@...nel.org>, <wander@...hat.com>,
        <etremblay@...tech-controls.com>, <macro@...am.me.uk>,
        <geert+renesas@...der.be>, <jk@...abs.org>,
        <phil.edworthy@...esas.com>, <lukas@...ner.de>,
        <linux-kernel@...r.kernel.org>, <linux-serial@...r.kernel.org>,
        <UNGLinuxDriver@...rochip.com>
Subject: RE: [PATCH v2 tty-next 1/3] 8250: microchip: pci1xxxx: Add driver for
 quad-uart support.

> From: Andy Shevchenko <andy.shevchenko@...il.com>
> Sent: Monday, October 31, 2022 8:07 PM
> To: Tharunkumar Pasumarthi - I67821
> <Tharunkumar.Pasumarthi@...rochip.com>
> Subject: Re: [PATCH v2 tty-next 1/3] 8250: microchip: pci1xxxx: Add driver for
> quad-uart support.
> 
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> > But, if I do this, I cannot use sysfs interface for updating rx_trig_bytes right?
> 
> Maybe, I don't remember by heart that part of the code. But why do you
> need that ABI in the first place?

By using the sysfs interface, our driver will be able to update the trigger level for the receiver fifo interrupt at runtime.

Thanks,
Tharun Kumar P

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