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Message-ID: <CAHp75Vf4DdDX_=9XZsocKg3k+SyCyYZ1i=9DoFxic4rOe9x2hA@mail.gmail.com>
Date:   Tue, 1 Nov 2022 17:17:00 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Tharunkumar.Pasumarthi@...rochip.com
Cc:     Kumaravel.Thiagarajan@...rochip.com, gregkh@...uxfoundation.org,
        jirislaby@...nel.org, ilpo.jarvinen@...ux.intel.com,
        u.kleine-koenig@...gutronix.de, johan@...nel.org,
        wander@...hat.com, etremblay@...tech-controls.com,
        macro@...am.me.uk, geert+renesas@...der.be, jk@...abs.org,
        phil.edworthy@...esas.com, lukas@...ner.de,
        linux-kernel@...r.kernel.org, linux-serial@...r.kernel.org,
        UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH v2 tty-next 1/3] 8250: microchip: pci1xxxx: Add driver for
 quad-uart support.

On Tue, Nov 1, 2022 at 5:04 PM <Tharunkumar.Pasumarthi@...rochip.com> wrote:
> > From: Andy Shevchenko <andy.shevchenko@...il.com>
> > Sent: Monday, October 31, 2022 8:07 PM

...

> > > But, if I do this, I cannot use sysfs interface for updating rx_trig_bytes right?
> >
> > Maybe, I don't remember by heart that part of the code. But why do you
> > need that ABI in the first place?
>
> By using the sysfs interface, our driver will be able to update the trigger level for the receiver fifo interrupt at runtime.

This doesn't answer my question. What is this needed for?

-- 
With Best Regards,
Andy Shevchenko

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