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Message-ID: <9fc4d874-a0d0-6c5c-aeee-61ab817fdd9f@linaro.org>
Date: Tue, 8 Nov 2022 16:21:56 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Jim Liu <jim.t90615@...il.com>, JJLIU0@...oton.com,
KWLIU@...oton.com, linus.walleij@...aro.org, brgl@...ev.pl,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, openbmc@...ts.ozlabs.org
Subject: Re: [PATCH v2 3/3] dt-bindings: gpio: Add Nuvoton NPCM750 serial I/O
expansion interface(SGPIO)
On 08/11/2022 10:28, Jim Liu wrote:
> NPCM750 include two SGPIO modules.
> Each module supports up to 64 input and 64 output pins.
> the output pin must be serial to parallel device(such as the hc595)
> the input in must be parallel to serial device(such as the hc165)
>
> Signed-off-by: Jim Liu <JJLIU0@...oton.com>
> ---
> Changes for v2:
> - modify description
> ---
> .../bindings/gpio/nuvoton,sgpio.yaml | 79 +++++++++++++++++++
> 1 file changed, 79 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
>
> diff --git a/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml b/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
> new file mode 100644
> index 000000000000..331e3cb28b98
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
> @@ -0,0 +1,79 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/nuvoton,sgpio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton SGPIO controller
> +
> +maintainers:
> + - Jim LIU <JJLIU0@...oton.com>
> +
> +description:
description: |
> + This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC,
> + NPCM7xx/NPCM8xx have two sgpio module each module can support up
> + to 64 output pins,and up to 64 input pin.
> + Nuvoton NPCM750 SGPIO module is base on serial to parallel IC (HC595)
> + and parallel to serial IC (HC165).
> + GPIO pins can be programmed to support the following options
> + - Support interrupt option for each input port and various interrupt
> + sensitivity option (level-high, level-low, edge-high, edge-low)
> + - Directly connected to APB bus and its shift clock is from APB bus clock
> + divided by a programmable value.
> + - nin_gpios is number of input GPIO lines
> + - nout_gpios is number of output GPIO lines
> + - ngpios is number of nin_gpios GPIO lines and nout_gpios GPIO lines.
> +
> +properties:
> + compatible:
> + enum:
> + - nuvoton,npcm750-sgpio
> + - nuvoton,npcm845-sgpio
> +
> + reg:
> + maxItems: 1
> +
> + gpio-controller: true
> +
> + '#gpio-cells':
> + const: 2
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + nin_gpios: true
> +
> + nout_gpios: true
These have several issues. No underscores, missing type, no description,
missing maxItems (if these were GPIOs...)
> +
> + bus-frequency: true
Why? Bus frequency of what? This is a property of bus controllers. You
need to explain in details in description what is this about.
> +
> +required:
> + - compatible
> + - reg
> + - gpio-controller
> + - '#gpio-cells'
> + - interrupts
> + - nin_gpios
> + - nout_gpios
> + - clocks
> + - bus-frequency
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + sgpio1: sgpio@...000 {
> + compatible = "nuvoton,npcm750-sgpio";
> + reg = <0x101000 0x200>;
> + clocks = <&clk NPCM7XX_CLK_APB3>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + bus-frequency = <16000000>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + nin_gpios = <64>;
> + nout_gpios = <64>;
> + status = "disabled";
Drop
Best regards,
Krzysztof
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