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Message-ID: <7181632.DvuYhMxLoT@diego>
Date: Mon, 28 Nov 2022 21:55:31 +0100
From: Heiko Stübner <heiko@...ech.de>
To: Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
linux-sunxi@...ts.linux.dev, Palmer Dabbelt <palmer@...belt.com>,
Conor Dooley <conor@...nel.org>,
linux-riscv@...ts.infradead.org,
Samuel Holland <samuel@...lland.org>
Cc: devicetree@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Jisheng Zhang <jszhang@...nel.org>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Andre Przywara <andre.przywara@....com>,
Samuel Holland <samuel@...lland.org>,
Albert Ou <aou@...s.berkeley.edu>,
Anup Patel <apatel@...tanamicro.com>,
Atish Patra <atishp@...osinc.com>,
Christian Hewitt <christianshewitt@...il.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Guo Ren <guoren@...nel.org>,
Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
Linus Walleij <linus.walleij@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Stanislav Jakubek <stano.jakubek@...il.com>,
Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v2 03/12] dt-bindings: riscv: Add Allwinner D1/D1s board compatibles
Am Samstag, 26. November 2022, 00:46:47 CET schrieb Samuel Holland:
> Several SoMs and boards are available that feature the Allwinner D1 or
> D1s SoC. Document their compatible strings.
>
> Acked-by: Rob Herring <robh@...nel.org>
> Signed-off-by: Samuel Holland <samuel@...lland.org>
Reviewed-by: Heiko Stuebner <heiko.stuebner@...ll.eu>
> ---
>
> Changes in v2:
> - Add MangoPi MQ (non-Pro) board
>
> .../devicetree/bindings/riscv/sunxi.yaml | 69 +++++++++++++++++++
> 1 file changed, 69 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/riscv/sunxi.yaml
>
> diff --git a/Documentation/devicetree/bindings/riscv/sunxi.yaml b/Documentation/devicetree/bindings/riscv/sunxi.yaml
> new file mode 100644
> index 000000000000..9edb5e5992b1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/riscv/sunxi.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/riscv/sunxi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allwinner RISC-V SoC-based boards
> +
> +maintainers:
> + - Chen-Yu Tsai <wens@...e.org>
> + - Jernej Skrabec <jernej.skrabec@...il.com>
> + - Samuel Holland <samuel@...lland.org>
> +
> +description:
> + Allwinner RISC-V SoC-based boards
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> + - description: Dongshan Nezha STU SoM
> + items:
> + - const: 100ask,dongshan-nezha-stu
> + - const: allwinner,sun20i-d1
> +
> + - description: D1 Nezha board
> + items:
> + - const: allwinner,d1-nezha
> + - const: allwinner,sun20i-d1
> +
> + - description: ClockworkPi R-01 SoM and v3.14 board
> + items:
> + - const: clockwork,r-01-clockworkpi-v3.14
> + - const: allwinner,sun20i-d1
> +
> + - description: ClockworkPi R-01 SoM, v3.14 board, and DevTerm expansion
> + items:
> + - const: clockwork,r-01-devterm-v3.14
> + - const: clockwork,r-01-clockworkpi-v3.14
> + - const: allwinner,sun20i-d1
> +
> + - description: Lichee RV SoM
> + items:
> + - const: sipeed,lichee-rv
> + - const: allwinner,sun20i-d1
> +
> + - description: Carrier boards for the Lichee RV SoM
> + items:
> + - enum:
> + - sipeed,lichee-rv-86-panel-480p
> + - sipeed,lichee-rv-86-panel-720p
> + - sipeed,lichee-rv-dock
> + - const: sipeed,lichee-rv
> + - const: allwinner,sun20i-d1
> +
> + - description: MangoPi MQ board
> + items:
> + - const: widora,mangopi-mq
> + - const: allwinner,sun20i-d1s
> +
> + - description: MangoPi MQ Pro board
> + items:
> + - const: widora,mangopi-mq-pro
> + - const: allwinner,sun20i-d1
> +
> +additionalProperties: true
> +
> +...
>
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