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Message-ID: <20230111221419.GA1710905@bhelgaas>
Date: Wed, 11 Jan 2023 16:14:19 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: Jian Yang <jian.yang@...iatek.com>
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>,
Jianjun Wang <jianjun.wang@...iatek.com>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Ryder Lee <ryder.lee@...iatek.com>,
Krzysztof WilczyĆski <kw@...ux.com>,
linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org,
Project_Global_Chrome_Upstream_Group@...iatek.com,
chuanjia.liu@...iatek.com, jieyy.yang@...iatek.com,
qizhong.cheng@...iatek.com, rex-bc.chen@...iatek.com,
david-yh.chiu@...iatek.com
Subject: Re: [PATCH 1/2] PCI: mediatek-gen3: Add power and reset control
feature for downstream component
Hi,
On Wed, Jan 11, 2023 at 11:25:41AM +0800, Jian Yang wrote:
> From: "jian.yang" <jian.yang@...iatek.com>
>
> Make MediaTek's controller driver capable of controlling power
> supplies and reset pin of a downstream component in power-on and
> power-off flow.
>
> Some downstream components (e.g., a WIFI chip) may need an extra
> reset other than of PERST# and their power supplies, depending on
> the requirements of platform, may need to controlled by their
> parent's driver. To meet the requirements described above, I add this
> feature to MediaTek's PCIe controller driver as a optional feature.
Is this delay (dsc-reset-msleep) specific to a device downstream from
the MediaTek controller, not to the MediaTek controller itself? If
so, it sounds like it should be a generic value that could be used by
other drivers, too.
How do you determine the value? If there's some PCIe spec that
determines this, please include a citation to it.
Bjorn
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