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Date: Sat, 11 Feb 2023 15:17:05 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Konrad Dybcio <konrad.dybcio@...aro.org>,
linux-arm-msm@...r.kernel.org, andersson@...nel.org,
agross@...nel.org, krzysztof.kozlowski@...aro.org
Cc: marijn.suijten@...ainline.org, Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Douglas Anderson <dianders@...omium.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Loic Poulain <loic.poulain@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
Vladimir Lypak <vladimir.lypak@...il.com>,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 02/10] drm/msm/dsi: Turn msm_dsi_config::io_start into a
2d array
On 11/02/2023 13:51, Konrad Dybcio wrote:
> Currently, we allow for MAX_DSI entries in io_start to facilitate for
> MAX_DSI number of DSI hosts at different addresses. The configuration
> is matched against the DSI CTRL hardware revision read back from the
> component. We need a way to resolve situations where multiple SoCs
> with different register maps may use the same version of DSI CTRL. In
> preparation to do so, make msm_dsi_config a 2d array where each entry
> represents a set of configurations adequate for a given SoC.
>
> This is totally fine to do, as the only differentiating factors
> between same-version-different-SoCs configurations are the number of
> DSI hosts (1 or 2, at least as of today) and the set of registers.
s/set of registers/starting address/ ?
> The regulator setup is the same, because the DSI hardware is the same,
> regardless of the SoC it was implemented in.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> ---
> drivers/gpu/drm/msm/dsi/dsi_cfg.c | 52 ++++++++++++++++++++++--------
> drivers/gpu/drm/msm/dsi/dsi_cfg.h | 5 ++-
> drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
> 3 files changed, 44 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
> index 6d21f0b33411..068d45b3a8f0 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
> @@ -21,7 +21,9 @@ static const struct msm_dsi_config apq8064_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(apq8064_dsi_regulators),
> .bus_clk_names = dsi_v2_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
> - .io_start = { 0x4700000, 0x5800000 },
> + .io_start = {
> + { 0x4700000, 0x5800000 },
> + },
> .num_dsi = 2,
> };
>
> @@ -41,7 +43,9 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(msm8974_apq8084_regulators),
> .bus_clk_names = dsi_6g_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
> - .io_start = { 0xfd922800, 0xfd922b00 },
> + .io_start = {
> + { 0xfd922800, 0xfd922b00 },
> + },
> .num_dsi = 2,
> };
>
> @@ -60,7 +64,9 @@ static const struct msm_dsi_config msm8916_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(msm8916_dsi_regulators),
> .bus_clk_names = dsi_8916_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
> - .io_start = { 0x1a98000 },
> + .io_start = {
> + { 0x1a98000 },
> + },
> .num_dsi = 1,
> };
>
> @@ -79,7 +85,9 @@ static const struct msm_dsi_config msm8976_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(msm8976_dsi_regulators),
> .bus_clk_names = dsi_8976_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names),
> - .io_start = { 0x1a94000, 0x1a96000 },
> + .io_start = {
> + { 0x1a94000, 0x1a96000 },
> + },
> .num_dsi = 2,
> };
>
> @@ -98,7 +106,9 @@ static const struct msm_dsi_config msm8994_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(msm8994_dsi_regulators),
> .bus_clk_names = dsi_6g_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
> - .io_start = { 0xfd998000, 0xfd9a0000 },
> + .io_start = {
> + { 0xfd998000, 0xfd9a0000 },
> + },
> .num_dsi = 2,
> };
>
> @@ -118,7 +128,9 @@ static const struct msm_dsi_config msm8996_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(msm8996_dsi_regulators),
> .bus_clk_names = dsi_8996_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
> - .io_start = { 0x994000, 0x996000 },
> + .io_start = {
> + { 0x994000, 0x996000 },
> + },
> .num_dsi = 2,
> };
>
> @@ -137,7 +149,9 @@ static const struct msm_dsi_config msm8998_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(msm8998_dsi_regulators),
> .bus_clk_names = dsi_msm8998_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names),
> - .io_start = { 0xc994000, 0xc996000 },
> + .io_start = {
> + { 0xc994000, 0xc996000 },
> + },
> .num_dsi = 2,
> };
>
> @@ -155,7 +169,9 @@ static const struct msm_dsi_config sdm660_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(sdm660_dsi_regulators),
> .bus_clk_names = dsi_sdm660_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names),
> - .io_start = { 0xc994000, 0xc996000 },
> + .io_start = {
> + { 0xc994000, 0xc996000 },
> + },
> .num_dsi = 2,
> };
>
> @@ -177,7 +193,9 @@ static const struct msm_dsi_config sdm845_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(sdm845_dsi_regulators),
> .bus_clk_names = dsi_sdm845_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
> - .io_start = { 0xae94000, 0xae96000 },
> + .io_start = {
> + { 0xae94000, 0xae96000 },
> + },
> .num_dsi = 2,
> };
>
> @@ -191,7 +209,9 @@ static const struct msm_dsi_config sm8550_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(sm8550_dsi_regulators),
> .bus_clk_names = dsi_sdm845_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
> - .io_start = { 0xae94000, 0xae96000 },
> + .io_start = {
> + { 0xae94000, 0xae96000 },
> + },
> .num_dsi = 2,
> };
>
> @@ -205,7 +225,9 @@ static const struct msm_dsi_config sc7180_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(sc7180_dsi_regulators),
> .bus_clk_names = dsi_sc7180_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names),
> - .io_start = { 0xae94000 },
> + .io_start = {
> + { 0xae94000 },
> + },
> .num_dsi = 1,
> };
>
> @@ -223,7 +245,9 @@ static const struct msm_dsi_config sc7280_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(sc7280_dsi_regulators),
> .bus_clk_names = dsi_sc7280_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names),
> - .io_start = { 0xae94000, 0xae96000 },
> + .io_start = {
> + { 0xae94000, 0xae96000 },
> + },
> .num_dsi = 2,
> };
>
> @@ -241,7 +265,9 @@ static const struct msm_dsi_config qcm2290_dsi_cfg = {
> .num_regulators = ARRAY_SIZE(qcm2290_dsi_cfg_regulators),
> .bus_clk_names = dsi_qcm2290_bus_clk_names,
> .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names),
> - .io_start = { 0x5e94000 },
> + .io_start = {
> + { 0x5e94000 },
> + },
> .num_dsi = 1,
> };
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
> index 44be4a88aa83..df9f09876ccb 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h
> +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
> @@ -32,13 +32,16 @@
>
> #define DSI_6G_REG_SHIFT 4
>
> +/* Maximum number of configurations matched against the same hw revision */
> +#define VARIANTS_MAX 2
> +
> struct msm_dsi_config {
> u32 io_offset;
> const struct regulator_bulk_data *regulator_data;
> int num_regulators;
> const char * const *bus_clk_names;
> const int num_bus_clks;
> - const resource_size_t io_start[DSI_MAX];
> + const resource_size_t io_start[VARIANTS_MAX][DSI_MAX];
> const int num_dsi;
> };
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 18fa30e1e858..22ba8726b0ea 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -1869,7 +1869,7 @@ static int dsi_host_get_id(struct msm_dsi_host *msm_host)
> return -EINVAL;
>
> for (i = 0; i < cfg->num_dsi; i++) {
> - if (cfg->io_start[i] == res->start)
> + if (cfg->io_start[0][i] == res->start)
> return i;
> }
>
--
With best wishes
Dmitry
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