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Message-ID: <CAHp75VfMae9M2R0Bw6-sYuHPPberakEzKct65SXV0XEaOFtXTg@mail.gmail.com>
Date: Wed, 8 Mar 2023 15:24:00 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Devi Priya <quic_devipriy@...cinc.com>
Cc: agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
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Subject: Re: [PATCH V8 4/7] pinctrl: qcom: Add IPQ9574 pinctrl driver
On Wed, Mar 8, 2023 at 11:52 AM Devi Priya <quic_devipriy@...cinc.com> wrote:
> On 3/7/2023 5:28 AM, andy.shevchenko@...il.com wrote:
...
> >> + depends on OF
> >
> > No compile test on non-OF configurations?
> As per the generic convention followed in other
> SoCs, we do not have compile test on non-OF configurations
Why not? So, you have to explain the deliberate narrowing of the test coverage.
> >> + depends on ARM64 || COMPILE_TEST
...
> >> +#define FUNCTION(fname) \
> >
> > PINCTRL_PINFUNCTION() ?
> I see that there are quite a bunch of files that has to
> be modified for using the generic data type and
> macro for the pin function definition
> We shall post a separate series to accommodate the changes
Sure, that's fine. Please do!
> >> + [msm_mux_##fname] = { \
> >> + .name = #fname, \
> >> + .groups = fname##_groups, \
> >> + .ngroups = ARRAY_SIZE(fname##_groups), \
> >> + }
...
> >> +#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
> >> + { \
> >> + .name = "gpio" #id, \
> >> + .pins = gpio##id##_pins, \
> >> + .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
> >
> > Can you embed struct pingroup?
> Will take care of this in a separate series
Ditto. Thanks!
> >> + }
...
> >> +};
> >
> > No MODULE_DEVICE_TABLE()?
> The MODULE_DEVICE_TABLE(of, ipq9574_pinctrl_of_match) entry has
> been added at the end of the file
So, you know what to do then to address my comment :-)
--
With Best Regards,
Andy Shevchenko
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