linux-kernel - Re: [PATCH v4 1/3] arm64: dts: Add device tree for the Emtop SOM IMX8MM

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <7e402ccc-e01d-cfd6-f9b5-48b313649e92@linaro.org>
Date:   Wed, 10 May 2023 14:59:54 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Himanshu Bhavani <himanshu.bhavani@...iconsignals.io>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Marek Vasut <marex@...x.de>,
        Frieder Schrempf <frieder.schrempf@...tron.de>,
        Stefan Wahren <stefan.wahren@...e.com>,
        Marcel Ziswiler <marcel.ziswiler@...adex.com>,
        Markus Niebel <Markus.Niebel@...group.com>,
        Heiko Stuebner <heiko@...ech.de>,
        Linus Walleij <linus.walleij@...aro.org>,
        Chris Morgan <macromorgan@...mail.com>,
        Jagan Teki <jagan@...eble.ai>,
        Conor Dooley <conor.dooley@...rochip.com>,
        Li Yang <leoyang.li@....com>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v4 1/3] arm64: dts: Add device tree for the Emtop SOM
 IMX8MM

On 10/05/2023 13:23, Himanshu Bhavani wrote:
> Add a device tree file describing the Emtop SOM IMX8MM
> 
> Signed-off-by: Himanshu Bhavani <himanshu.bhavani@...iconsignals.io>


> +&iomuxc {
> +	pinctrl_gpio_led: gpioledgrp {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16			0x19
> +			MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29			0x19
> +		>;
> +	};
> +
> +	pinctrl_i2c1: i2c1grp {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL				0x400001c3
> +			MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA				0x400001c3
> +		>;
> +	};
> +
> +	pinctrl_pmic: pmicirq {

No improvements.

Do not send more than one version per 24h and allow others reviewers to
actually review.

Best regards,
Krzysztof