[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <mhng-1895c1c0-4bc8-4156-909e-c20fa66e82fd@palmer-ri-x1c9>
Date: Fri, 12 May 2023 14:50:17 -0700 (PDT)
From: Palmer Dabbelt <palmer@...belt.com>
To: Conor Dooley <conor@...nel.org>
CC: samuel@...lland.org, dmitry.osipenko@...labora.com,
rafael.j.wysocki@...el.com, aou@...s.berkeley.edu,
apatel@...tanamicro.com, Atish Patra <atishp@...osinc.com>,
geert@...ux-m68k.org, heiko@...ech.de, kai.heng.feng@...onical.com,
mcgrof@...nel.org, paulmck@...nel.org,
Paul Walmsley <paul.walmsley@...ive.com>, pmladek@...e.com,
yuehaibing@...wei.com, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, tangmeng@...ontech.com
Subject: Re: [PATCH 0/3] riscv: sbi: Switch to the sys-off handler API
On Wed, 28 Dec 2022 10:30:11 PST (-0800), Conor Dooley wrote:
> Hey Samuel,
>
> On Wed, Dec 28, 2022 at 10:19:12AM -0600, Samuel Holland wrote:
>> I want to convert the axp20x PMIC poweroff handler to use the sys-off
>> API, so it can be used as a fallback for if the SBI poweroff handler
>> is unavailable. But the SBI poweroff handler still uses pm_power_off, so
>> done alone, this would cause the axp20x callback to be called first,
>> before the SBI poweroff handler has a chance to run.
>>
>> In order to prevent this change in behavior, the SBI poweroff handler
>> needs to be converted to the sys-off API first, at a higher priority.
>>
>> This series performs the conversion, after accounting for the fact that
>> the SBI poweroff handler is registered quite early during boot.
>>
>> The first patch is a dependency for both this series and the PSCI
>> series[1], so I would like to get at least patch 1 merged soon.
>>
>> [1]: https://lore.kernel.org/lkml/20221105214841.7828-1-samuel@sholland.org/
>>
>>
>> Samuel Holland (3):
>> kernel/reboot: Use the static sys-off handler for any priority
>> riscv: sbi: Share the code for unsupported extension warnings
>> riscv: sbi: Switch to the sys-off handler API
>
> Not what other stuff has reboot support, so I gave it a whirl on
> PolarFire SoC & it seemed to work as expected:
> Tested-by: Conor Dooley <conor.dooley@...rochip.com>
Acked-by: Palmer Dabbelt <palmer@...osinc.com>
in case the reboot folks want to take these. I'm also happy to take the
reboot change through the RISC-V tree with an Ack. There's some
discussion about this in the previous patches.
>
> Thanks,
> Conor.
Powered by blists - more mailing lists