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Message-ID: <20230518-dipping-hydrogen-7e6b673d327a@spud>
Date: Thu, 18 May 2023 21:58:20 +0100
From: Conor Dooley <conor@...nel.org>
To: Jisheng Zhang <jszhang@...nel.org>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>, Guo Ren <guoren@...nel.org>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, Yangtao Li <frank.li@...o.com>,
Wei Fu <wefu@...hat.com>, Icenowy Zheng <uwu@...nowy.me>
Subject: Re: [PATCH v2 9/9] riscv: defconfig: enable T-HEAD SoC
On Fri, May 19, 2023 at 02:45:41AM +0800, Jisheng Zhang wrote:
> Enable T-HEAD SoC config in defconfig to allow the default
> upstream kernel to boot on Sipeed Lichee Pi 4A board.
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks,
Conor.
>
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> ---
> arch/riscv/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index d98d6e90b2b8..109e4b5b003c 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -27,6 +27,7 @@ CONFIG_EXPERT=y
> CONFIG_PROFILING=y
> CONFIG_SOC_MICROCHIP_POLARFIRE=y
> CONFIG_ARCH_RENESAS=y
> +CONFIG_ARCH_THEAD=y
> CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_STARFIVE=y
> CONFIG_ARCH_SUNXI=y
> --
> 2.40.0
>
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