lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <1e1eacff-7859-e704-07e1-aec8379fa55d@quicinc.com>
Date:   Fri, 16 Jun 2023 10:40:05 -0700
From:   Jessica Zhang <quic_jesszhan@...cinc.com>
To:     Marijn Suijten <marijn.suijten@...ainline.org>
CC:     Rob Clark <robdclark@...il.com>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>, <quic_abhinavk@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
        <freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/msm/dsi: Enable BURST_MODE for command mode for DSI
 6G v1.3+



On 6/14/2023 2:43 AM, Marijn Suijten wrote:
> On 2023-06-12 16:37:36, Jessica Zhang wrote:
>> During a frame transfer in command mode, there could be frequent
>> LP11 <-> HS transitions when multiple DCS commands are sent mid-frame or
>> if the DSI controller is running on slow clock and is throttled. To
>> minimize frame latency due to these transitions, it is recommended to
>> send the frame in a single burst.
>>
>> This feature is supported for DSI 6G 1.3 and above, thus enable burst
>> mode if supported.
>>
>> Signed-off-by: Jessica Zhang <quic_jesszhan@...cinc.com>
>> ---
>>   drivers/gpu/drm/msm/dsi/dsi_host.c | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
>> index 744f2398a6d6..8254b06dca85 100644
>> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
>> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
>> @@ -994,6 +994,11 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
>>   		dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_TOTAL,
>>   			DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL(hdisplay) |
>>   			DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL(mode->vdisplay));
>> +
>> +		if (msm_host->cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
>> +				msm_host->cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_3)
>> +			dsi_write(msm_host, REG_DSI_CMD_MODE_MDP_CTRL2,
>> +					DSI_CMD_MODE_MDP_CTRL2_BURST_MODE);
> 
> This is not part of the timing setup, and a similar BURST_MODE flag is
> enabled for video-mode in dsi_ctrl_config() - should it be moved there?

Hi Marijn,

Sure, I can move the change to dsi_ctrl_enable() instead.

> 
> (There is a dsi_sw_reset() in between the calls to dsi_timing_setup()
>   and dsi_ctrl_cfg())
> 
> Note that that function sets up the CMD_CFG0 and CMD_CFG1 register, with
> the former having a very similar layout to MDP_CTRL2... is there
> documentation outlining the difference?

I see what you mean, but unfortunately I'm not able to give you any 
documentation about the differences between them.

FWIW, I think the macros in dsi.xml.h should give you a sense of what's 
within the registers and the slight differences between them.

Thanks,

Jessica Zhang

> 
> - Marijn
> 
>>   	}
>>   }
>>   
>>
>> ---
>> base-commit: dd969f852ba4c66938c71889e826aa8e5300d2f2
>> change-id: 20230608-b4-add-burst-mode-a5bb144069fa
>>
>> Best regards,
>> -- 
>> Jessica Zhang <quic_jesszhan@...cinc.com>
>>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ