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Message-ID: <20230711-dab-imaging-2124096a7b3b@wendy>
Date: Tue, 11 Jul 2023 12:38:34 +0100
From: Conor Dooley <conor.dooley@...rochip.com>
To: Anup Patel <apatel@...tanamicro.com>
CC: Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Atish Patra <atishp@...shpatra.org>,
Andrew Jones <ajones@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>,
Conor Dooley <conor@...nel.org>,
Anup Patel <anup@...infault.org>,
<linux-riscv@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/2] Misc RISC-V timer driver improvements
On Tue, Jul 11, 2023 at 05:07:11PM +0530, Anup Patel wrote:
> On Tue, Jul 11, 2023 at 4:51 PM Conor Dooley <conor.dooley@...rochip.com> wrote:
> > Other than wondering why you opted for 450 (curiosity really), this
> > stuff looks fine to me.
>
> It is the same as the rating for clock_event_device used by ARM arch timer.
That's what I figured, thanks!
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