linux-kernel - Re: [PATCH 0/2] Misc RISC-V timer driver improvements

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Date:   Wed, 16 Aug 2023 07:24:53 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...belt.com>
To:     apatel@...tanamicro.com
CC:     Paul Walmsley <paul.walmsley@...ive.com>,
        daniel.lezcano@...aro.org, tglx@...utronix.de,
        atishp@...shpatra.org, ajones@...tanamicro.com,
        sunilvl@...tanamicro.com, Conor Dooley <conor@...nel.org>,
        anup@...infault.org, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org, apatel@...tanamicro.com
Subject:     Re: [PATCH 0/2] Misc RISC-V timer driver improvements

On Mon, 10 Jul 2023 06:19:00 PDT (-0700), apatel@...tanamicro.com wrote:
> This series does two improvements to the RISC-V timer driver:
> 1) Keep timer interrupt enable state in-sync with interrupt subsystem
> 2) Increase rating of clock event device when Sstc is available
>
> These patches can also be found in the riscv_timer_imp_v1 branch at:
> https://github.com/avpatel/linux.git
>
> Anup Patel (2):
>   clocksource: timer-riscv: Don't enable/disable timer interrupt
>   clocksource: timer-riscv: Increase rating of clock_event_device for
>     Sstc
>
>  drivers/clocksource/timer-riscv.c | 17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)

Acked-by: Palmer Dabbelt <palmer@...osinc.com>

in case the clock folks want to pick these up.  Otherwise I'll look more 
closely and take them via the RISC-V tree.  Thanks!