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Date:   Fri, 14 Jul 2023 15:10:50 +0900
From:   Jaewon Kim <jaewon02.kim@...sung.com>
To:     Chanho Park <chanho61.park@...sung.com>,
        'Krzysztof Kozlowski' <krzysztof.kozlowski@...aro.org>,
        'Rob Herring' <robh+dt@...nel.org>,
        'Krzysztof Kozlowski' <krzysztof.kozlowski+dt@...aro.org>,
        'Conor Dooley' <conor+dt@...nel.org>,
        'Alim Akhtar' <alim.akhtar@...sung.com>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: exynos: add pwm node for exynosautov9-sadk


On 23. 7. 14. 14:59, Chanho Park wrote:
>>> +			reg = <0x103f0000 0x100>;
>>> +			samsung,pwm-outputs = <0>, <1>, <2>, <3>;
>>> +			#pwm-cells = <3>;
>>> +			clocks = <&xtcxo>;
>> This does not look like correct clock. Are you sure XTCXO goes to PWM?
> Yes. XTXCO is the source clock of the pwm. Unlike any other exynos SoCs, the clock is directly derived from the external OSC.
> Thus, it cannot be controllable such as gating.


Thanks Chanho.

I miss this comment.


>
> Best Regards,
> Chanho Park
>
>

Thanks

Jaewon Kim

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