linux-kernel - RE: [PATCH 3/3] dt-bindings: usb: dwc2: add compatible "intel,socfpga-stratix10-hsotg"

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Message-ID: <PH0PR11MB51913FB3A55B1420B7798C01F139A@PH0PR11MB5191.namprd11.prod.outlook.com>
Date:   Wed, 19 Jul 2023 08:45:39 +0000
From:   "Li, Meng" <Meng.Li@...driver.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "conor+dt@...nel.org" <conor+dt@...nel.org>,
        "dinguyen@...nel.org" <dinguyen@...nel.org>,
        "hminas@...opsys.com" <hminas@...opsys.com>,
        "linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 3/3] dt-bindings: usb: dwc2: add compatible
 "intel,socfpga-stratix10-hsotg"



> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Sent: Wednesday, July 19, 2023 2:39 PM
> To: Li, Meng <Meng.Li@...driver.com>; gregkh@...uxfoundation.org;
> robh+dt@...nel.org; krzysztof.kozlowski+dt@...aro.org; conor+dt@...nel.org;
> dinguyen@...nel.org; hminas@...opsys.com; linux-usb@...r.kernel.org;
> devicetree@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> Subject: Re: [PATCH 3/3] dt-bindings: usb: dwc2: add compatible "intel,socfpga-
> stratix10-hsotg"
> 
> CAUTION: This email comes from a non Wind River email account!
> Do not click links or open attachments unless you recognize the sender and
> know the content is safe.
> 
> On 19/07/2023 04:55, Meng Li wrote:
> > Add the compatible "intel,socfpga-stratix10-hsotg" to the DWC2
> > implementation, because the Stratix DWC2 implementation does not
> > support clock gating. This compatible is used with generic snps,dwc2.
> >
> > Signed-off-by: Meng Li <Meng.Li@...driver.com>
> 
> Missing changelog, missing versioning. This is v3 or v4.
> 
> > ---
> >  Documentation/devicetree/bindings/usb/dwc2.yaml | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml
> > b/Documentation/devicetree/bindings/usb/dwc2.yaml
> > index dc4988c0009c..f90094320914 100644
> > --- a/Documentation/devicetree/bindings/usb/dwc2.yaml
> > +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml
> > @@ -51,6 +51,7 @@ properties:
> >                - amlogic,meson-g12a-usb
> >                - amlogic,meson-a1-usb
> >                - intel,socfpga-agilex-hsotg
> > +              - intel,socfpga-stratix10-hsotg
> 
> So you just sent the same patch as before. I pointed you to the proper solution
> with compatibility.
> 

No. not the same.
I don't understand why SoC specific compatible "intel,socfpga-agilex-hsotg" is able to be added, but the SoC specific compatible "intel,socfpga-stratix10-hsotg" is not allowed.

You said "Where is SoC specific compatible?"
Now, I add the SoC specific compatible "intel,socfpga-stratix10-hsotg", but why it is still not reasonable.

Thanks,
Limeng

> 
> 
> Best regards,
> Krzysztof