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Message-ID: <1dbe006d-0576-ac79-3774-fe262e5a532c@kernel.org>
Date:   Fri, 15 Sep 2023 05:51:42 -0500
From:   Dinh Nguyen <dinguyen@...nel.org>
To:     sharath.kumar.d.m@...el.com, lpieralisi@...nel.org, kw@...ux.com,
        robh@...nel.org, bhelgaas@...gle.com, linux-pci@...r.kernel.org
Cc:     linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 0/2] PCI: altera: add support to agilex family

On 9/11/23 08:53, sharath.kumar.d.m@...el.com wrote:
> From: D M Sharath Kumar <sharath.kumar.d.m@...el.com>
> 
> added new callback for
> 1) read,write to root port configuration registers
> 2) read,write to endpoint configuration registers
> 3) root port interrupt handler
> 
> agilex and newer platforms need to implemant the callback and generic root
> port driver should work ( without much changes ) , legacy platforms (arria
>   and startix) implement configuration read,write directly in wrapper
> api _altera_pcie_cfg_read/_altera_pcie_cfg_write
> 
> changelog v2:
> saperated into two patches
> 1.refactored the driver for easily portability to future Altera FPGA
> platforms
> 2.added support for "Agilex" FPGA
> 
> this driver supports PCI RP IP on Agilex FPGA, as these are FPGA its up
> to the user to add PCI RP or not ( as per his needs). we are not adding
> the device tree as part of this commit. we are expecting the add device
> tree changes only if he is adding PCI RP IP in his design
> 
> changelog v3:
> incorporate review comments from Bjorn Helgaas
> 
> 

You've sent 6 versions of this patchset in a 3-hour time span, what is 
going on?

Dinh

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