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Message-ID: <51abc760-8d6a-41b6-8a10-e03be5edc486@linaro.org>
Date: Sat, 30 Sep 2023 17:53:11 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Xianwei Zhao <xianwei.zhao@...ogic.com>,
linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Neil Armstrong <neil.armstrong@...aro.org>,
Jerome Brunet <jbrunet@...libre.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Kevin Hilman <khilman@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: Re: [PATCH 0/4] Add C3 SoC PLLs and Peripheral clock
On 28/09/2023 08:34, Xianwei Zhao wrote:
> Add C3 SoC PLLs and Peripheral clock controller dt-bindings.
> Add PLLs and Peripheral clock controller driver for C3 SOC.
>
> Xianwei Zhao (4):
> dt-bindings: clock: add Amlogic C3 PLL clock controller bindings
> dt-bindings: clock: add Amlogic C3 peripherals clock controller
> bindings
> clk: meson: C3: add support for the C3 SoC PLL clock
> clk: meson: c3: add c3 clock peripherals controller driver
>
This was absolutely never tested :(
It does not look like you tested the bindings, at least after quick
look. Please run `make dt_binding_check` (see
Documentation/devicetree/bindings/writing-schema.rst for instructions).
Maybe you need to update your dtschema and yamllint.
Best regards,
Krzysztof
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