linux-kernel - Re: [POC][RFC][PATCH v2] sched: Extended Scheduler Time Slice

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <644da047-2f7a-4d55-a339-f2dc28d2c852@efficios.com>
Date:   Fri, 27 Oct 2023 12:09:56 -0400
From:   Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
To:     Steven Rostedt <rostedt@...dmis.org>
Cc:     Linus Torvalds <torvalds@...ux-foundation.org>,
        Peter Zijlstra <peterz@...radead.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ankur Arora <ankur.a.arora@...cle.com>, linux-mm@...ck.org,
        x86@...nel.org, akpm@...ux-foundation.org, luto@...nel.org,
        bp@...en8.de, dave.hansen@...ux.intel.com, hpa@...or.com,
        mingo@...hat.com, juri.lelli@...hat.com,
        vincent.guittot@...aro.org, willy@...radead.org, mgorman@...e.de,
        jon.grimm@....com, bharata@....com, raghavendra.kt@....com,
        boris.ostrovsky@...cle.com, konrad.wilk@...cle.com,
        jgross@...e.com, andrew.cooper3@...rix.com,
        Joel Fernandes <joel@...lfernandes.org>,
        Youssef Esmat <youssefesmat@...omium.org>,
        Vineeth Pillai <vineethrp@...gle.com>,
        Suleiman Souhlal <suleiman@...gle.com>,
        Ingo Molnar <mingo@...nel.org>,
        Daniel Bristot de Oliveira <bristot@...nel.org>
Subject: Re: [POC][RFC][PATCH v2] sched: Extended Scheduler Time Slice

On 2023-10-26 16:45, Steven Rostedt wrote:
> On Thu, 26 Oct 2023 14:59:13 -0400
> Mathieu Desnoyers <mathieu.desnoyers@...icios.com> wrote:
> 
>>> for a rough implementation of a 'xchg()' without SMP coherency, just
>>> cpu-local one (ie atomic wrt being preempted by the kernel, but not
>>> atomic wrt other CPU's accessing the same variable concurrently)
>>
>> Actually Steven does not need a xchg to test-and-set a single bit which
>> is only accessed concurrently between kernel and userspace from the same
>> thread. Either "bts" or "andb" should work fine.
> 
> Hmm, how would bts work? Doesn't that just set a bit?

Yes, and it saves the bit state in the CF flag before setting it.

If you need to clear a bit then it would be "btr".

> 
> I need to clear one bit while seeing if another bit is set. I could also
> use subl, as that would also atomically clear the bit.

Ah ok, I did not get that you needed to test for a different bit than 
the one you clear.

Thanks,

Mathieu

> 
> -- Steve

-- 
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com