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Message-ID: <20231124110018.33c10a48@canb.auug.org.au>
Date: Fri, 24 Nov 2023 11:00:18 +1100
From: Stephen Rothwell <sfr@...b.auug.org.au>
To: Alex Deucher <alexdeucher@...il.com>,
Dave Airlie <airlied@...hat.com>
Cc: Daniel Vetter <daniel.vetter@...ll.ch>,
Jani Nikula <jani.nikula@...ux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@...el.com>,
Intel Graphics <intel-gfx@...ts.freedesktop.org>,
DRI <dri-devel@...ts.freedesktop.org>,
Alex Deucher <alexander.deucher@....com>,
Fangzhi Zuo <jerry.zuo@....com>,
Imre Deak <imre.deak@...el.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linux Next Mailing List <linux-next@...r.kernel.org>,
Ville Syrjälä <ville.syrjala@...ux.intel.com>
Subject: Re: linux-next: manual merge of the drm-intel tree with the amdgpu
tree
Hi all,
On Mon, 20 Nov 2023 12:28:18 +1100 Stephen Rothwell <sfr@...b.auug.org.au> wrote:
>
> Today's linux-next merge of the drm-intel tree got a conflict in:
>
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
>
> between commits:
>
> a58555359a9f ("drm/amd/display: Fix DSC not Enabled on Direct MST Sink")
> c29085d29562 ("drm/amd/display: Enable DSC Flag in MST Mode Validation")
>
> from the amdgpu tree and commit:
>
> 7707dd602259 ("drm/dp_mst: Fix fractional DSC bpp handling")
>
> from the drm-intel tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging. You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
>
> --
> Cheers,
> Stephen Rothwell
>
> diff --cc drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> index 8d7d4024f285,2afd1bc74978..000000000000
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> @@@ -1650,7 -1636,8 +1650,7 @@@ enum dc_status dm_dp_mst_is_port_suppor
> } else {
> /* check if mode could be supported within full_pbn */
> bpp = convert_dc_color_depth_into_bpc(stream->timing.display_color_depth) * 3;
> - pbn = drm_dp_calc_pbn_mode(stream->timing.pix_clk_100hz / 10, bpp, false);
> + pbn = drm_dp_calc_pbn_mode(stream->timing.pix_clk_100hz / 10, bpp << 4);
> -
> if (pbn > aconnector->mst_output_port->full_pbn)
> return DC_FAIL_BANDWIDTH_VALIDATE;
> }
This is now a conflict between the amdgpu tree and the drm tree.
--
Cheers,
Stephen Rothwell
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